搜索资源列表
XilinxPartialReconfiguration
- xilinx官方推出的xilinx FPGA的部分重配置（partialreconfiguration）的教程，适合基于FPGA的PCIE开发人员参考和学习。-the official launch of the xilinx FPGA xilinx part of reconfiguration (partialreconfiguration) of the tutorial, suitable for FPGA-based reference and learning PCIE develo
XilinxAdvancedFPGACourse
- xilinx官方推出的基于xilinx FPGA的高级设计的教程，适合较高级别的FPGA开发人员参考和学习。-xilinx the official launch of the advanced design based on xilinx FPGA tutorial, suitable for a higher level of FPGA developers to reference and learning.
double_dcm
- 这个主要是在xilinx FPGA中双DCM连接的问题，这个问题网上资料很少，自己研究后并且仿真之后可以实现两个dcm的正常工作，实现倍频和时钟的反相-This is mainly the double in xilinx FPGA DCM connection problem which little information online, their own studies and simulation can be achieved after the normal work of the
Virtex-5EMAC
- This application note describes a system using the Virtex™ -5 Embedded Tri-Mode Ethernet MAC (Ethernet MAC) Wrapper core on a Xilinx Virtex-5 ML505 development board. The system provides an example of how to integrate the Virtex-5 Embedded T
FPGASDRAMverilog
- 一个基于Xilinx FPGA的DDRSDRAM的Verilog控制代码，使用的FPGA为Virtex完整源代码。-A Xilinx FPGA-based control DDRSDRAM the Verilog code for the Virtex FPGA using the full source code.
Busy_PeopleEDK
- 一个Xilinx FPGA上构架一个CPU软核， 以提高整个系统的灵活性，和可扩展性,EDK快速学习代码-On a Xilinx FPGA soft-core architecture of a CPU to improve overall system flexibility, and scalability, EDK quick learning code
Advanced-FPGA-Design-Techniques
- FPGA高级设计技巧Xilinx篇，非常有参考价值-Xilinx Advanced FPGA design techniques articles, very valuable
ISE_lab3
- xilinx公司FPGA开发板多路复用器的设计-xilinx FPGA ise
ISE_lab4
- xilinx公司FPGA 开发板比较器的设计VERILONG程序-xilinx FPGA VERILONG
FPGA-Design-Techniques-(Xilinx)
- 本文档为深圳市华为技术有限公司的内部资料，讲解FPGA高级设计技巧 -This document Shenzhen Huawei Technologies Co., Ltd. internal data to explain the high-level FPGA design skills
synth_fft
- fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools
2007_Xilinx
- 2007年Xilinx 联合实验室主任会议 FPGA设计时序收敛-2007 meeting of directors of Xilinx FPGA Design Joint Lab timing closure
Test
- xilinx PIO示例程序源码，基于Vitex5 FPGA生成的IP。-xilinx PIO sample program source code, generated Vitex5 FPGA-based IP.
xapp1022
- xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件、-xilinx FPGA platform testing by MET PCIe IP core documentation and source files
VHD
- 此为基于Xilinx的FPGA用VHDL实现的FIFO，已调通，可直接运行。-This is based on Xilinx FPGA using VHDL implementation of the FIFO, has been transferred through, can be directly run.
fifosy
- 用于对Xilinx FPGA FIFO的控制及读写-Xilinx FPGA FIFO
XILINX
- In this module we prepare our students to familiar with XILINX ISE TOOL, which is used for Simulation, Synthesis and implementation on FPGA KIT.
LogicAnalyzer
- 用java做的逻辑分析上位机软件，下位机用xilinx的fpga实现-Logical analysis of java to do with PC software, the next crew to use xilinx fpga implementation of
UART-Communication
- Xilinx FPGA UART communication code
FPGA
- 赛灵思公司，本书从逻辑设计、数字信号处理、嵌入式系统设计和高速连接功能等方面系统介绍了FPGA开发应用。-Xilinx, book design from logic, digital signal processing, embedded system design and high-speed connectivity and other aspects of the system describes the development and application of FPGA.