This example sets up the PLL in x10/2 mode, divides SYSCLKOUT by six to reach a 25Mhz HSPCLK (assuming a 30Mhz XCLKIN). The clock divider in the ADC is not used so that the ADC will see the 25Mhz on the HSPCLK. Interrupts are enabled and the EVA i

ARM7的LPC2478在ADS1.2开发环境下按键触发ADC转换程序-ARM7-LPC2478 development environment in the ADS1.2 key trigger ADC conversion process

lpc2478 adc 源代码，可以直接使用-lpc2478 adc code

lpc2478ADC.rar 自制开发板a/d采样 用于lpc2478采样-lpc2478ADC.rar self-development board a/d sampling sampling for lpc2478