搜索资源列表
MAX_II_board_schematics
- Altera MAX II 开发板原理图-Altera's MAX II development board schematics
MAXII-Evalboard-V1.00-Designpa
- 完整的ALTERA MAXⅡEPM570试验板资料,包括原理图和PCB图,BOM表,可以直接做板。,Complete ALTERA MAX Ⅱ EPM570 test boards, including schematic and PCB diagram, BOM tables, plates can be directly done.
ug_alt_ufm.rar
- ALTERA公司的MAXⅡ系列CPLD的内部flash使用教程,内容很详细,图文并茂,英文版。,ALTERA s MAX Ⅱ series CPLD to use the internal flash tutorial is very detailed, with illustrations in English.
altera_epm1270_MAX.rar
- 一个ALTERA公司EPM1270 cpld的实验板原理图,其中有PCI接口电路,PDF格式,A ALTERA Corporation EPM1270 cpld schematic diagram of the experimental board, including PCI interface circuit, PDF format
QEP_FOR_ENCODER
- ALTERA MAX Ⅱ EPM570上QEP的源码,已经通过测试。-ALTERA MAX Ⅱ EPM570 source code on the QEP has been tested.
MAX-PLUSII-soft
- MAX+PLUSII软件是一个功能强大,容易使用的软件包,它可以以图 形方式、文字输入方式(AHDL、VHDL和VERILOG)和波形方式输入设计文 件,可以编译并形成各种能够下装到EPROM和各种ALTERA器件的文件,还可 以进行仿真以检验设计的准确性,下面举例说明该软件的使用-MAX+ PLUSII software is a powerful, easy-to-use software package, which can graphically, text input me
FPGA_AD
- 基于Altera的FPGA开发的基于FPGA的AD转换功能,完全通过验证。-Altera s FPGA-based development of FPGA-based AD conversion function, fully validated.
a_block_with_several_functions_with_Verilog_HDL.ra
- Verilog是广泛应用的硬件描述语言,可以用在硬件设计流程的建模、综合和模拟等多个阶段。随着硬件设计规模的不断扩大,应用硬件描述语言进行描述的CPLD结构,成为设计专用集成电路和其他集成电路的主流。通过应用Verilog HDL对多功能电子钟的设计,达到对Verilog HDL的理解,同时对CPLD器件进行简要了解。 本文的研究内容包括: 对Altera公司Flex 10K系列的EPF10K 10简要介绍,Altera公司软件Max+plusⅡ简要介绍和应用Verilog HDL对多功能
MAXII_Device_Handbook
- Altera 公司生产的CPLD系列中的低端高性能产品MAXII用户手册,这个也能从Altera官方网站上下载。-Altera' s CPLD series production of low-end high-performance products MAXII user' s manual, this is also downloaded from the Altera website.
cangyongEDAgjzn
- 4.1 Altera MAX+plusⅡ操作指南 4.1.1 MAX+plusⅡ10.2的安装 4.1.2 MAX+plusⅡ开发系统设计入门 4.2 Xilinx ISE Series的使用 4.2.1 ISE的安装 4.2.2 ISE工程设计流程 4.2.3 VHDL设计操作指南 4.2.4 ISE综合使用实例 4.3 Lattice ispDesignEXPERT的使用 4.3.1 ispDesignEXPERT的安装 4.3.2 原理图输入方式设计
MUXplus2
- Max+plusⅡ是Altera公司提供的FPGA/CPLD开发集成环境,Max+plusⅡ界面友好,使用便捷,被誉为业界最易用易学的EDA软件。本资源分七节内容详细的讲解了MUX+PLUSⅡ软件的操作及应用。-Altera Max+ plus Ⅱ is provided by FPGA/CPLD development integration environment, Max+ plus Ⅱ friendly interface and easy to use, known as the ED
VHDL5.2
- In this report the design, implementation and testing of a Combination State Lock Machine from the given information, all of the design steps will be carried out using altera Max Plus II software package.
maxv_5m570z_SCH_PCB_PA
- Altera公司的Max 5 GX系列的原理图和pcb文件,注意,是capture及pdf格式的原理图和allegro格式的PCB文件,稍微修改修改就可以用在您的设计中,让fpga的硬件设计变得简单和高效。-Altera Max 5 the GX series of schematic and pcb files, note that the capture and pdf format of the schematic and PCB files of the allegro format,
madadianji_controller
- 使用altera MAX II CPLD 做的马达步进电机控制器。-Motor stepper motor controller using the altera MAX II CPLD to do.
m7000
- ALTERA MAX EPM7000 series CPLD full datasheet
LED-ZOU-MA-DENG
- 这是基于ALTERA MAX系列低端FPGA开发板的LED走马灯源文件。压缩包包含了可以运行的整个工程。环境为QUARTUS II。-This is based ALTERA MAX series low-end FPGA development board LED lantern source files. Compressed packet contains the entire project can run. Environment QUARTUS II.
XUELIEXINHAOFASHENGQI
- 基于ALTERA MAX系列FPGA的开发板的序列信号发生器源码。应该可以通用。设计环境为QUARTUS II。压缩包包含整个工程。-ALTERA MAX Series FPGA-based development board serial signal generator source. Should be universal. Design environment QUARTUS II. Archive contains the entire project.
ZIDONGSHOUHUOJI
- QUARTUS平台下,VHDL编写的自动售货机源代码。基于ALTERA MAX系列FPGA开发板。绝对原创。-QUARTUS platform, VHDL source code written in vending machines. Based ALTERA MAX Series FPGA development board. Absolutely original.
VHDL_ALTERA_Max-EPM570-BELL
- ALTERA MAX-II-EPM570 VHDL Source code Bell , shematic 21EDA-ALTERA MAX-II-EPM570 VHDL Source code Bell , shematic 21EDA
RS232
- 基于altera MAX II,实现与上位机间的rs232串口通信。(Based on Altera MAX II, the RS232 serial communication between the host computer and the host computer is realized)