搜索资源列表
NIOS_new
- 基于Altera Cyclone系列FPGA的NIOS II开发板原理图，OrCAD格式
16550
- UART16550兼容的串行通讯控制器，Verilog语言描述，采用Altera Cyclone系列芯片实现FPGA综合，因为FIFO部分利用到内部资源实现。已经在某项目中成功应用，特此推出。
LCD1602_controller
- 基于VHDL的LCD 1602 控制器源程序，Altera cyclone II 系列-The source program of LCD 1602 controller
LCD12864controller
- 基于 VHDL的LCD12864 控制器设计，Altera 的cyclone II 系列-LCD12864 controller design based on VHDL, Altera cyclone II Series
CyclonePLL
- Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。 PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟
CycloneIII_SB_3C25
- Altera的CycloneIII Start Board,使用的PFGA是3C25，包括原理图和PCB，用Cadence Allegro打开-Altera
VerilogHDL_t
- fpga设计参考实验手册红色飓风系列fpga设计参考实验手册，红色飓风系列-FPGA reference design experiment manual red hurricane series FPGA reference design experiment manuals, red hurricane series
EP2C5
- Altera FPGA Cyclone II EP2C5 最小系统 开发板-the minimum system of Altera FPGA EP2C5 and or EP2C8
altera-cyclone-data-sheet
- Altera结合带有软件工具的可编程逻辑技术、知识产权（IP）和技术服务，在世界范围内为14,000多个客户提供高质量的可编程解决方案。-Altera combines the programmable logic with software tools, intellectual property (IP) and technology services worldwide to more than 14,000 customers with high quality programmable
DDS
- 基于FPGA的DDS直接信号合成器，基于Altera CYcloneII系列-DDS direct FPGA-based signal synthesis, based on Altera CYcloneII Series
da1_test
- ad转换，采用Altera Cyclone FPGA (EP1C6-PQ240)芯片， 在QuartusII 9.0 下编译，有较好的参考价值，已通过测试。-ad conversion, using the Altera Cyclone FPGA (EP1C6-PQ240) chip, in QuartusII 9.0 compiler, a better reference value, has been tested.
ALTERA-chip-schematic-and-footprint-
- 比较全的ALTERA芯片的原理图和封装库.rar 使用环境为protel99SE 原来使用一个Cyclone芯片做库时，搜集到的资料。没有问题。-Comparison of the whole of the ALTERA chip schematic and footprint libraries. Rar use environment protel99SE
Cyclone-III-FPGA.sch
- Altera官方Cyclone III实验板原理图，可以作为自己的参考设计-Altera Cyclone III test board official schematic diagram can be used as their reference design
Altera DE2 TV BOX with Effects Project
- Altera DE2 TV BOX with Effects Project maintaied for Cyclone 2
CCD_Array
- Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
A4_Clock
- 基于Altera的Cyclone4的时钟程序(clock program based on Cyclone4 of Altera)
Description
- Altera software examples Cyclone IV
KEY2_TEST
- Altera firmware examples for Cyclone IV
KEY3_TEST
- Atera Cyclone IV examples for quartus
LED_test
- Altera Cyclne IV example for Quartus