搜索资源列表
crc_gen.pl
- CRC verilog 生成脚本，可自己设定CRC 参数-CRC verilog generate scr ipts, you can set their own parameters CRC
vspi_for
- 用VERILOG编写的SPI通信源码，很好很齐全，可以很容易地修改到自己的产品上-SPI communication with the VERILOG source code written in, nice and complete, you can easily modify to their own products
test_mac_loopback
- 用来测试MAC地址回环的VERILOG程序，可以继续完善它-Loop used to test the MAC address of the VERILOG program, you can continue to improve it
10-binary-counter
- 使用verilog实现10进制计数器功能,可以实现Quartus仿真，含任意进制计数器程序-10 binary counter using verilog implementation function, can realize Quartus simulation program with an arbitrary binary counter
eetop.cn_DDS_CORDIC_eetop
- 数字verilog设计数字算法CORDIC可以很好的为学生提供指导-Digital verilog design can be a good number of CORDIC algorithm to provide guidance for students
FlyPiano
- 这是我的第一个程序，希望能够对大家有用。-verilog file john son verilog this is my first verilog file.It is very easy.I hope it can help you
1024Mb_ddr2
- DDR2的Verilog仿真代码，可以使用ModelSim仿真-DDR2' s Verilog simulation code, you can use the ModelSim simulation
jiaotongdeng
- 用verilog编写的交通控制灯程序，直接就可以运行。对于一般的学者可以参考应用。-Prepared by the traffic control lights verilog program to run directly. Scholars can refer to the general application.
fpga_dds_coylone_2
- dds设计，花了一个星期做的,verilog写的，可生成多种波形，频率范围可上M,性能不错。-dds design, spent a week doing, verilog to write, can generate a variety of waveforms, the frequency range available on the M, the performance good.
verilogexample
- verilog学习资料。附带简单的源代码列子，可以直接使用和仿真。-verilog learning materials. Source code with a simple Lie Zi, and simulation can be used directly.
_11_vga_color_slip
- FPGA用Verilog编写VGA接口，可接在电脑显示器上-Written by Verilog FPGA VGA interface, which can be accessed on the computer monitor
my_232
- 个人用verilog写的一个FPGA串口通信程序，程序测试成功，可以使用。-Individual by verilog written by one of the FPGA serial communication program that test, can use success.
caitiao
- 运用VHDL，Verilog语言编写的实现显示器显示彩条的硬件控制系统，下载到Virtex2Pro实验板FPGA上，外接显示器即可，相当于一个简单的显示卡驱动程序，不过是用纯硬件实现的-The use of VHDL, Verilog language to achieve color display of the hardware control system, downloaded to the FPGA board Virtex2Pro experiment, an external di
ep2c35_3.8_full_add
- 这个程序用verilog硬件语言编写。用来在FPGA内实现全加器。并且可以将输出显示在外部LED灯上等。-this program is writen by verilog HDL.it is the full adder for FPGA.users can read the result from the LEDs.
honglvdeng
- Verilog HDL作为一种规范的硬件描述语言,被广泛应用于电路的设计中。他的设计描述可被不同的工具所支持,可用不同器件来实现。利用Verilog HDL语言自顶向下的设计方法设计交通灯控制系统，使其实现道路交通的正常运转，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Xilinx ISE6.02和ModelSim5.6完成综合、仿真。此程序通过下载到FPGA芯片后,可应用于实际的交通灯控制系统中。-Verilog HDL as a standard hardware
VHDLshixianCPU2
- vhdl实现cpu用verilog写的8位CPU源码，通过汇编语言可以实现加减乘左移右移等运算。并通过ASC流程可以模拟出其内部电路结构。代码，截图，readme在文件夹中-With 8-bit CPU to write verilog source code, assembly language can be achieved through the addition, subtraction and other operations right left. ASC process throu
SdpCtrlSimPrj
- 一个对芯片进行软件解锁的仿真工程，可以在Modelsim环境下仿真运行，可作为学习Verilog和仿真的朋友的一个很好的例子-One pair of chip engineering simulation software unlock, you can run in Modelsim simulation environment, simulation can be used as learning Verilog and friends a good example
EDA_dianzhen
- 使用verilog语言写的16*16的点阵，能够实现左移、右移、暂停、复位等功能，可以自己定制RAM，改变显示的内容。-Verilog language written using the 16* 16 dot matrix, to achieve left, right, pause, reset and other functions, you can customize RAM, change the display content.
61EDA_B327
- 键盘鼠标的源代码(用FPGA实现,使用Verilog HDL编写,已经使用FPGA验正过了,完全可以用)-Keyboard and mouse the source code (using FPGA, written using Verilog HDL, has been a positive experience with FPGA, can be used)
ethernet10-100M-IP-core
- 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated