搜索资源列表
Three-state-bidirectional-drive
- 这是三态双向驱动器的Verilog源程序,已经编译通过,可以直接使用-This is a tri-state bi-directional drive the Verilog source code, has been compiled by, can be used directly
Long-frame-synchronous-clock
- 这是长帧同步时钟产生的Verilog源程序,已经编译通过,可以直接使用-This is a long frame sync clock generated Verilog source code, has been compiled by, can be used directly
Variable-mode--counter
- 这是可变模加减计数器的Verilog源程序,已经编译通过,可以使用-This is the variable mode subtraction counter Verilog source code, has been compiled by, you can use
digital-clock
- 该程序是有verilog实现的fpga的交通灯 适用于cycloneII芯片 可供fpga初学者学习verilog语言时参考,不仅可以显示时钟 还能调整时钟分针秒针-The program is a verilog realize fpga of traffic light is applicable to cycloneII chips available for beginners to learn verilog fpga languages as reference, not only
81
- 一个关于JPEG的例子,是用Verilog编写的,可以综合。-A case of JPEG is written in Verilog, can be integrated.
SDRAM_TEST
- 用Verilog硬件描述语言驱动SDRAM,内有完整可实现源代码,且还有现象说明-With the Verilog hardware descr iption language driven SDRAM, can be realized within the complete source code, and there is the phenomenon described
SRAM_TEST
- 用Verilog语言驱动SRAM,内有SRAM可实现源代码以及对应现象说明-With the Verilog language-driven SRAM, SRAM can be realized within the source code and corresponding descr iption of the phenomenon
triangular_wave
- sr flipflop verilog you can simulate it in any eda tool
ADDER
- verilog DHL编写的一位全加器,编译通过。稍作修改便可编程任意位加法器。-verilog DHL write a full adder, compiled by. Slight modifications can be programmed any adder.
source
- 关于verilog的ppt可见 学习一下吧 很有用的说-Ppt on verilog to learn about it can be seen that useful
key_debounce
- verilog实现的按键消抖源代码,初学fpga的可以学习下-implementation of key debounce verilog source code, beginners can learn from fpga
PS2_interface
- ps接口实现,硬件描述语言verilog实现,功能测试完整,可实现功能-ps interface, hardware descr iption language verilog implementation, functional testing complete functionality can be achieved
i2c.tar
- I2C verilog IP, can be synthesized and fpga proven.
lizi
- 用标准的verilog实现的vga256色,实验,可以在电脑上是实现,用的就是家用的电脑显示器,可以清楚看到256se-this is a standard verilog experence which can dest the vga 256 color
sdram_vhdl
- DDR(双速率)SDRAM控制器参考设计verilog代码,可以直接用的,很好的。-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good.
shaodou
- 这是一小段VERILOG的关于捎抖的程序,可以作为一个模块来使用-This is a small piece of VERILOG about a shaking program, can be used as a module to use
verilog6
- 用verilog语言编写的VGA显示程序。通过本程序可以学习到VGA显示原理,及如何用verilog语言编写vga显示程序。压缩包内也包含此VGA显示程序的modelsim仿真文件。-Verilog language with the VGA display program. Through this program can learn to VGA Display principles, and how to use the verilog language vga display progr
usb_latest.tar
- USB 源码。Verilog实现的USB程序,用ISE打开工程文件即可-USB verilog code。-Verilog implementation USB program, open the project file with the ISE can be
UART
- 用verilog编写的串口程序。含发送与接收代码 波特率可选-Verilog write with the serial program. Including sending and receiving code baud rate can be chosen
Booths_16bit
- verilog program is there u can download it