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Cy7C68013-slavefifo-design.rar
- 使用Cypress的Cy7C68013A芯片进行设计，实现Slave FIFO模式的数据采集。程序包括USB固件程序以及主机程序。,Using Cypress' s Cy7C68013A chip design, data acquisition Slave FIFO mode. The program includes a USB firmware and host program.
cy7c68013
- 高速usb外设控制器 具有usb2.0高速，可达480M-The high-speed USB peripheral controller has usb2.0 high speed, up to 480M
Bulkloop1
- CY7C68013固件，从FIFO模式，CPU不参与数据传输，使用EP2 和EP6端点，同步模式，批量传输模式-CY7C68013 firmware from the FIFO mode, the CPU does not participate in data transmission, using EP2 and EP6 endpoint, synchronous mode and bulk transfer mode
FPGA-port_Verilog_HDL
- CY7C68013与FPGA接口的Verilog HDL实现，经过本人实验检验过的，-CY7C68013 and FPGA interface Verilog HDL realize the experiment after I test
AsyFIFO
- cy7c68013a芯片的slaveFIFO传输例程，利用异步传输可以实现数据读写，包含芯片固件代码和fpga发送数据的代码。
USB-COM-routines
- 使用CPLD实现的USB通讯与UART通讯相互转换，USB通讯速率可以达到20M 使用专用USB接口芯片cy7c68013芯片-Using CPLD implementation of USB communication and conversion between UART communication, USB communication speed can reach 20M using the dedicated USB interface chip chip cy7c68013
CY3686FW-np
- cy7c68013 Nand Flash U盘模拟工程-cy7c68013 Nand Flash U disk simulation project
MYFX2
- usb cy7c68013开发板中CPLD的源代码-USB2.0-128P to restore the I2C settings dev_io
periph
- 在keilc中进行EZUSB 的CY7C68013的必不可少的源文件，很重要哦-Keilc in EZUSB in the CY7C68013 indispensable source file, it is very important, oh
FX2LP-FPGA
- xilinx FPGA XC6LX9 与CY7C68013通信程序-xilinx FPGA XC6LX9 and communication program CY7C68013
USBFPGA
- 这个事usb芯片cy7c68013和赛科龙2fpga的开发板原理图，可以实现高速的数据通讯和上位机，可以480mb的速度传输数据可以组成100m的逻辑分析仪-This thing usb chip cy7c68013 and race Kelon 2fpga development board schematics, can achieve high-speed data communications and PC, you can transfer data at speeds of 100m
CY7C68013andFPGAinterface
- CY7C68013与FPGA接口的Verilog HDL实现-Verilog HDL CY7C68013 and FPGA implementation of the interface
SynchronizeAutomaticallyEntersCPLD
- CPLD与CY7C68013通讯程序，使用的是同步输入功能，测试过了可以使用，需要下载自动同步驶入的固件。-CPLD and CY7C68013 communication program that uses synchronous input function test can be used, you need to download the firmware automatically synchronized into.
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
CY7C68013_Camara_Usb
- CY7C68013驱动OV7725摄像头，通过USB将图像上传到PC端，程序代码包含USB程序，OV7725驱动程序和用户控制程序-CY7C68013 drive OV7725 cameras, USB upload image to PC, program code contains a USB, OV7725 driver and user controls
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
FX2LP-firmware
- cy7c68013 同步Slave fifo传输 固件。 经测试，速度可以达到每秒40MB以上。 网上很多代码均为异步，速度最多只能到10多MB。注意：因为和FPGA配套，时钟是外部提供，若有不明，可以联系我。-cy7c68013 slave fifo sync transfer firmware. Speed up to 40MB/s.
usb_wr_firmware141023
- USB2.0协议芯片CY7C68013固件程序源代码-CY7C68013 USB2.0 protocol chip firmware source code
CY7c68013A_USB_SourceCode
- Cpress CY7C68013固件源代码，亲测可用-Cpress CY7C68013 Source Code
Cypress-Suite-USB-3.4.6
- cy7c68013 3.4.6固件Cypress Suite USB 3.4.6-cy7c68013 3.4.6Cypress Suite USB 3.4.6