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dct
- 2维DCt源码，可以实现8乘8点数据的2维DCT变换
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
DCT
- 用于视频图像编码的8×8DCT变换，可用于MPEG4.H263等VHDL编程-For video images encoded 8 × 8DCT transform, can be used to MPEG4.H263 such as VHDL Programming
1DCT_VHDL
- VHDL Behavioral Model for 1D DCT operation Algorithm : Calculates the 1D DCT coefficients. DCT Points range from 8 to 32. There is double buffering at the input, to allow continuous usage of DCT engine.-VHDL Behavioral Model for 1D DCT operation
DCT_Final
- 8 point approximate dct for image compression the purpose compression algorithm
verilog dct
- 其使用模块的代码风格来编写，能够8点dct的转换(Its use of the module's code style to write, to 8 dct conversion)