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JESD79_4
- DDR4由JEDEC最新发布的英文协议,浅显易懂,希望对开发的同仁提供帮助-DDR4 easy to understand, I hope to help colleagues developed by JEDEC latest English agreement
ed_synth_17_0_0_290
- 在A10的fpga上实现DDR4的上电初始化,调试通过。(The DDR4 on A10 FPGA is initialized and debugged.)
DDR_sdram
- 文件里有DDR3/DDR4 sram的verliog模型,而且具有DDR4参考书(The document has a verliog model of DDR3/DDR4 SRAM, and it has DDR4 reference books.)