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dds
- 基于ATMEGA16和DDS的信号发生器的代码,内含一个基于IAR集成开发环境的工程,可直接用IAR打开,编译并烧入单片机,是本人花了半个月的一个成果-ATmega16 and DDS-based signal generator code, contains a IAR integrated development environment based on the works, can be directly used IAR open, compile and burn into the s
dds
- 使用VHDL硬件描述语言实现了直接频率合成器的制作,并在Altera公司的CycloneII上得到实现,验证了代码的正确性。用户操作可以参照程序中的说明,请使用QuartusII6.0以上版本打开,低版本打开时会有错误提示-Using VHDL hardware descr iption language to achieve a direct frequency synthesizer production, and Altera s CycloneII be realized, to ver
FPGAdds
- 用verilog写的DDS程序,请用QuartusII 8.1以上版本打开-DDS program written using verilog, please QuartusII 8.1 or later to open
DDS__FPGA
- 基于FPGA的DDS信号发生器设计,包含Quartus 的工程,打开即可使用,Verilog 语言编写!-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容
DDS
- 这是一个dds产生方波、三角波、正弦波的代码。请用Quartus II打开-This is a dds produce square wave, triangle wave, sine wave code. Please open the Quartus II
DDS
- DDS信号发生器原理图,用protel DXP才能打开。可以做到12M正选信号输出失真很小-DDS signal generator schematic, with protel DXP to open. 12M can do is select a small distortion of the signal output