搜索资源列表
MyFilter.rar
- FPGA实现数字滤波器，用VHDL语言实现的直接1型FIR滤波器，具有较好的参考价值。,FPGA realization of digital filters using VHDL language to achieve the direct FIR filter type 1, has a good reference value.
VHDL_FIR_PRO_scr.rar
- 可编程的FIR滤波器VHDL实现，只要输入FIR的阶数以及系数，就可在FPGA中实现FIR滤波器,Programmable FIR filter VHDL implementation, simply enter the order number as well as the FIR coefficients, we can implement FIR filters in FPGA
fir
- 本设计用verilog代码实现FIR滤波器！-Verilog code of the design FIR filters to achieve!
data
- fpga嵌入式应用之数字滤波器 里面有部分matlab+vhdl-FPGA embedded applications of digital filters there are some matlab+ vhdl
DDC_CIC
- 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
hilbert_transformer_latest.tar
- The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it possible to approximate the Hil
fri
- 滤波器的设计的，用于FIR滤波器的设计和应用-The design of filters for the FIR filter design and application
filter_vhdl
- vhdl语言编写的fir和iir滤波器程序。在quartus上仿真通过。-vhdl language program fir and iir filters. Quartus adopted in the simulation.
cic_bf
- vhdl编写的梳妆滤波器和蝶形运算的算法。蝶形计算通过调用fpga内部的乘法器实现。-dressing prepared vhdl butterfly filters and computing algorithms. Butterfly calculation by calling the multiplier to achieve within the fpga.
fir_sig
- 直接型FIR滤波器，VHDL语言，程序结构简单，-A direct-type FIR filters, VHDL language, program structure is simple,
fir_filter
- 实现滤波器的功能，有限冲激响应（FIR）数字滤波器和无限冲激响应（IIR）数字滤波器广泛应用于数字信号处理系统中。IIR数字滤波器方便简单，但它相位的非线性，要求采用全通网络进行相位校正，且稳定性难以保障。FIR滤波器具有很好的线性相位特性，使得它越来越受到广泛的重视。-Realize the filter function, finite impulse response (FIR) digital filters and infinite impulse response (IIR) dig
filter1
- 题为基于CSD编码的FIR数字滤波器设计.该滤波器具有线性相位,系数减半.采用VHDL语言编写.是我们EDA课程的作业,得了优.希望对大家有用-Entitled based on CSD code FIR digital filter design. That the filters have linear phase, coefficient half. Using VHDL language. Is the EDA program operations, got excellent. Hop
32fir
- 32阶滤波器分布式算法实现的主程序代码,用EP2c35f84c8寄存器速率可达243.55MHz-32-order FIR digital filters: 32 filters distributed algorithm order the main program code, register with EP2c35f84c8 rate up to 243.55MHz
fir
- FPGA实现的FIR滤波器，很好的参考资料！-FPGA implementation of FIR filters, a very good reference!
filteramp
- 该VHDL程序编写了各种滤波器和放大器，对于刚学VHDL的同学有极大的帮助-The VHDL programming a variety of filters and amplifiers, for students just learning VHDL great help
FPGA-Prototyping-by-VHDL-Examples---Xilinx-Sparta
- FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others-FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others
VHDLPFIR
- 基于VHDL的FIR滤波器设计。详细讲了用硬件设计FIR滤波器！-The FIR filter design based on VHDL. Details about the hardware design of FIR filters with!
Digital-Signal-Processing-with-FPGA
- FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
VHDL
- 这个是基于一下的要求设计的：1、输入输出数据宽度为12位， 2、阶数为4阶段线性相位FIR滤波器， 3、类型为：低通。-This is based on what the requirements of the design: an input and output data width is 12, 2, the order of the four stages of linear phase FIR filters, 3, type: low pass
FIR_filter_based_on_fpga_in_VHDL
- 主要介绍基于FPGA的FIR滤波器的实现及其设计文档，VHDL语言-It introduces the realization and design documents FPGA-based FIR filters, VHDL language