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3des_vhdl_latest
- 3DES的VHDL IP核,64位 标准fips 46-3 NIST,并且使用3组64位密钥-The VHDL implementation 3DES,The core complies with the Triple-DES 64-bit block cipher defined in fips 46-3 NIST standard and operates with three 64-bit keys. Functional Descr
SHA_1_V
- 基于fips 180-4标准的SHA-1算法的verilog HDL实现-fips 180-4 standard SHA-1 algorithm-based verilog HDL implementation
SHA-256
- 基于fips 180-4标准的SHA-256算法的verilog HDL实现-SHA-256 algorithm based on fips 180-4 standard verilog HDL implementation
sha1_v01
- 基于fips 180-4标准的SHA-1算法的verilog HDL实现,分模块分别实现-fips 180-4 standard SHA-1 algorithm-based verilog HDL sub-modules, respectively, to achieve