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4位汉明编译码源代码。VHDL格式,经过仿真和测试通过,请放心使用。-four Hamming encryption source code. VHDL format, through simulation and test pass, please rest assured that use.
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用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错,然后将其纠错译码并输出,详细过程见仿真。-Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and
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在传统51上实现汉明码的编码解码,开发环境keil,并用proteus进行仿真。-In traditional 51 implemented on han gold-digging coding and decoding, development environment, and proteus keil simulation.
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汉明码的解码电路,用VHDL实现,可以用于FPGA仿真-Hamming code decoding circuit, VHDL implementation, can be used for FPGA simulation
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基于FPGA,利用vhdl语言实现hamming编码的一段程序,已经仿真过-Based on FPGA, VHDL language hamming coding a program simulation
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不组帧汉明编码/解码,Verilog语言实现,带仿真程序。
-No framing hamming encoding/decoding, Verilog language, with the simulation program.
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Verilog HDL语言编写的汉明编码及解码器,附有时序仿真文件(Verilog HDL language encoding and decoding Hamming, with timing simulation file)
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