用Verilog语言实现汉明编码，很粗燥，是大三的时候做的-With the Verilog language Hamming code, it is rough dry, a junior at the time to do

产生m序列作为输入信号，能够实现(7,4)汉明码编码和译码功能。同时，还有加噪模块。 在QuartusII工作环境下使用-M sequence generated as the input signal, can be achieved (7,4) hamming code encoding and decoding functions. There are also additional noise modules. Working environments in the QuartusI

比较流行的汉明码和crc 的一些教程和编码译码的程序-Hamming code and a number of tutorials and programs crc

Verilog HDL语言编写的汉明编码及解码器，附有时序仿真文件(Verilog HDL language encoding and decoding Hamming, with timing simulation file)