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标准SDR SDRAM控制器参考设计_verilog_lattice
- 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
fongen2006
- 從TureType字檔提取出字體並解碼出LCM點陣字碼的範例.-TureType word from the extracted file and print out LCM lattice decoder code examples.
RD1006--I2C
- RD1006--I2C与存储器的IP 代码及说明文档，lattice提供，I2C Controller for Serial EEPROMs 源代码可用，并且包含tb文件-RD1006 -- I2C and memory IP code and documentation. Lattice offer I2C Controller for Serial EEPROMs source code available, and document contains tb -
sdram_vhdl_lattice.rar
- lattice sdram 控制器VHDL源代码,Sound code of Lattice Sdram Controller based on VHDL
MICO8_DEMO_03_18_08.ZIP
- Lattice 超精简8位软核CPU--Mico8，开放所有源代码，包括VHDL，编译器，支持GCC编译器。可在Lattice所有FPGA和MachXO 器件上使用。本例包含示例和说明文档。对使用Lattice器件的用户或者学习CPU设计的人员有较高参考价值。,Lattice super-streamlined eight soft-core CPU- Mico8, open up all the source code, including VHDL, the compiler to supp
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
UART_VHDL_Verilog_Lattice
- 本压缩包中含有串口程序的VHDL,Verilog，Lattice三种版本的代码，均已实现。在压缩包中，含有非常详细的串口的实现规格。各种版本的代码中，含有完成的源文件，测试文件，模拟文件。-This compressed package contains serial process VHDL, Verilog, Lattice three versions of the code, have been achieved. In the compressed package, contains
FontMaker
- 1、从Keil C源代码中自动提取中文字符，并生成从左至右、从上至下顺序的字库文件； 2、生成的字库自动按升序排列； 3、提取中文时自动识别并跳过注释内容； 4、可自动分辨点阵大小，须在源代码中行末加注释。如行末加“//12X12”表示该行中的中文字符全部为12X12点阵-1, from the Keil C source code automatic extraction of Chinese characters, and generates from left to right
A01
- 利用XC9572-TQFP100(Xilinx CPLD)制作的多功能CPLD/FPGA的ISP下载线源代码及线路图。可用来烧录Xilinx,Lattice,Altera等厂家的CPLD/FPGA.-Using XC9572-TQFP100 (Xilinx CPLD) produced by multi-CPLD/FPGA download cable ISP in the source code and circuit diagram. Burning can be used to Xilin
Lattice-Machxo-FPGA-Loader
- Application note (source code + documentation) about how to use an FPGA (Lattice Machxo) to perform a ISP programming of a parallel flash.-Application note (source code+ documentation) about how to use an FPGA (Lattice Machxo) to perform a ISP progra
I2C_xo
- IIC的verilog源码，可以在Lattice的XO DEMO板上运行的IIC代码。内附说明文件-IIC' s verilog source code, you can Lattice' s XO DEMO board to run IIC code. Included documentation
HANZTool
- 将输入的汉子，转换成点阵码，以用于嵌入式系统LCD显示灯！-The input of the guy, into a lattice code, for use in embedded system LCD display lights!
DDRsdram2
- 一个DDR2 的控制器源码，它是由LATTICE的编译器生成。-A DDR2 controller source code, which is generated by the compiler LATTICE.
FPGA_UART
- 用Verilog语言实现的FPGA UART独立收发模块 思路简单，代码简洁。在Lattice LFE3EA VERSA开发板上验证通过,编译器Lattice Diamond. 功能：串口收到数据后立即回传，此后每一秒串口数据+1再发送。-Using Verilog language independent of FPGA UART transceiver idea is simple, concise code. Development board in Lattice LFE3EA
Lattice-calendar
- 16*64的点阵显示屏源代码，实际测试过。完全可以使用。具备万年历的功能。-16* 64 dot matrix display source code, the actual tested. Can use. With calendar functionality.
led16-lattice-Original)
- Ied16点阵，代码效率极高，欢迎大家进行进一步的改进，适合菜鸟参考，高手练手！-Ied16 dot, high code efficiency, we welcome further improvements for rookie reference, master practiced hand!
latticeECP3-serdes-test-code
- lattice ECP3系列高速FPGA serdes测试代码-lattice ECP3 series high speed serdes test code
LED-lattice
- 这是一款51单片机的LED点阵显示的代码，初学者可以通过这套代码了解LED点阵的实现过程。-This is the code of a 51 single LED dot matrix display, beginners can learn to achieve through this process LED dot matrix code.
Lattice
- 本程序为单片机的c语言源程序，可以实现单片机控制led点阵的移屏显示-This procedure for microcontroller c language source code, can achieve single-chip control led dot matrix display screen shift
标准SDR SDRAM控制器参考设计，Lattice提供
- 说明： SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Descr iption: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)