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FPGADE270CACULATOR
- 本文介绍了一个简单的计算器的设计,该设计采用了现场可编程逻辑器件FPGA设计,并基于VHDL语言实现加减乘除功能,并用十进制显示在LCD1602上。-This article describes a simple calculator design that uses a field programmable logic device FPGA design and VHDL language based on arithmetic functions, and decimal display
LCD1602-DRIVER(vhdl)
- LCD602的驱动器模块源代码 可直接使用 编译环境QUARTUS II 7.2-LCD602 drive module source code Can be used directly Compilation environment QUARTUS II 7.2