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CoursewareOfDigitalCircuit
- 这是关于数字电路的ppt课件，对于组合逻辑电路和时序逻辑电路都讲得比较清晰透彻。-This is on digital circuits ppt courseware, for combinational logic circuits and sequential logic circuits have stood out clear and thorough.
Tug-of-war-game
- 拔河游戏机制作的原理图PCB原理图。数字逻辑电路。-Tug-of-war game produced by PCB schematic schematic. Digital logic circuits.
ch4ex
- 一部分简单时序逻辑电路的VHDL源代码，未包含状态机描述-Part of a simple sequential logic circuits VHDL source code, does not contain a descr iption of state machine
ch8ex
- 几个简单数字逻辑电路的VHDL代码，带有简单的说明-A few simple digital logic circuits VHDL code, with a simple note
shuzimimasuo
- 本文的电子密码锁利用数字逻辑电路，实现对门的电子控制，并且有各种附加电路保证电路能够安 工作，有极高的安全系数-In this paper, the electronic code lock using digital logic circuits, the realization of the electronic door control, and has various additional circuits to ensure circuit to security work, h
RMA
- RSA算法，采用逻辑电路搭建，电路设计原理图-RSA algorithm, used to build logic circuits, circuit design schematic
shuzhiluoj
- 把时序逻辑电路设计和组合逻辑电路设计相结合，设计一个有实际应用的数字逻辑电路余3码转换成2421 BCD 码-The sequential logic circuit design and the design of combinational logic circuit by combining the design of a practical application of digital logic circuits into three yards more than 2421 BCD
vhdl
- ：以上海地区的出租车计费器为例，利用Verilog HDL语言设计了出租车计费器，使其具有时间 显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示 了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。源程序经MAX+PLUS Ⅱ软件调试、优 化，下载到EPF1OK10TC144—3芯片中，可应用于实际的出租车收费系统。-: A Shanghai taxi meter area for example, the use of Veri
vhdl
- Very high speed integrated Hardware Descr iption Language (VHDL) -是IEEE,工业标准硬件描述语言 -用语言的方式而非图形等方式描述硬件电路 容易修改 容易保存 -特别适合于设计的电路有: 复杂组合逻辑电路,如: -译码器,编码器,加减法器,多路选择器,地址译码 -Very high speed integrated Hardware Descr iption Language (VHDL)-
clock
- 这是一个数字时钟的数字逻辑电路，整个工程打包上传，时钟可以计时、校时、整点报时、定时闹钟。使用电路图实现的。在quatarsII里面仿真的并且下载到DE2板上运行过。-This is a digital clock digital logic circuits, the whole project package upload, the clock could be time, school hours, the whole point timekeeping, timing alarm clo
main
- 数字钟是一种用数字电路技术实现时、分、秒计时的装置，与机械式时钟相比具有更高的准确性和直观性，且无机械装置，具有更更长的使用寿命，因此得到了广泛的使用。数字钟从原理上讲是一种典型的数字电路，其中包括了组合逻辑电路和时序电路。目前，数字钟的功能越来越强，并且有多种专门的大规模集成电路可供选择-Digital Clock is a digital circuit technology with the hours, minutes, seconds, timing devices, as compa
Verilog
- 通过本文章的学习能够使我们设计一些简单的逻辑电路和系统。很快我们就能过渡到设计相当复杂的数字逻辑系统。-To learn through this article, will enable us to design some simple logic circuits and systems. Soon we will be able to transition to the design of complex digital logic systems.
wave
- 10f202 作为简单的波形发生器。可用于逻辑电路调试。-10f202 as a simple waveform generator. Logic circuits can be used for debugging.
Figure_Models
- 用VHDL设计的基本数字逻辑电路，能实现交通灯、模数转换、数模转换等功能-VHDL design using the basic digital logic circuits, to achieve traffic light, ADC, DAC and other functions
L298
- L298低位晶体管的发射器连接到一起，而其对应的外部端口则可用来连接一个外部感应电阻。L298还提供一个额外的电压输入，所以其逻辑电路可以工作在更低的电压下。 -L298 low emitter transistors connected together, and their corresponding external port can be used to connect an external sense resistor. L298 also provides an additio
Some_classic_examples_of_VHDL_language_source_code
- ＶＨＤＬ语言的一些经典实例源代码，包括状态机，时序电路，组合逻辑电路等-Some classic examples of VHDL language source code, including the state machine, sequential circuits, combinational logic circuits
Classical_sequential_logic_circuits_tutorial
- 时序逻辑电路经典教程Classical sequential logic circuits tutorial-Classical sequential logic circuits tutorial Classical sequential logic circuits tutorial
Analysis_of_digital_circuits_combinational_logic_c
- 数字电路组合逻辑电路分析教程Analysis of digital circuits combinational logic circuits tutorial-Digital circuits combinational logic circuit analysis tutorial Analysis of digital circuits combinational logic circuits tutorial
Hardware_development_component_design_combinationa
- 硬件开发中规模组件设计组合电路教程Hardware scale of the development of component design combinational logic circuits tutorial-Hardware scale of the development of component design combinational logic circuits tutorial
asynchronous-sequential-circuits
- 利用基本RS触发器设计电平异步时序电路的方法 此文档帮助读者设计数字逻辑电路，并非VHDL语言实现-The use of the basic RS flip-flop design level asynchronous sequential circuits This document is to help readers design digital logic circuits, not the VHDL language