搜索资源列表
mux4
- 四位乘法器的VHDL语言设计，并有原理图的描述-4 Multiplier VHDL language design, and schematic descr iption of
mux4
- 这是个四输入乘法器，还可以进步扩充端口-This is a four-input multiplier, but also the progress of the expansion of port
mux4
- 基于VHDL的四位加法器的实现，通过此加法器的设计，可以扩展到更多位的加法器的设计-VHDL-based implementation of the four adder, through the design of this adder, can be extended to more bits Adder
Mux4
- Mux is designed by verilog use ISE of xilinx.have 4 input
MUX4
- 本程序使用vhdl语言编写，能够在ALTERA CPLD-EPM3128A平台上模拟出一个多路数据选通器。-This program written in vhdl language, be able to simulate a multi-channel data strobe device of ALTERA CPLD-EPM3128A platform.
mux4
- 改程序实现的四选一数据选择器的工程，该程序为自己编程，并经过仿真验证此程序正确-Reform program to achieve the four selected a data selector works, the program for their own programming, and through simulation this procedure correctly
Mux4
- This Mux4 verilog code.-This is Mux4 verilog code.