搜索资源列表
Nios_IPphone
- 这是基于altera的片上处理器nios 的一个IP电话终端的设计,来源altera的电子设计文章大赛.
nios_uIP
- 微型TCP/IP协议栈在NIOS上的应用
DE2_NIOS_LITE_SRAM
- DE2-SRAM-IP-CORE 需要开发ip core的朋友可以参考哦 ~-DE2-SRAM-IP-CORE need to develop friends can ip core reference Oh ~
SmartSOPC_Component
- smartSOPC NIOS IP core，周立功FPGA实验箱IP核-smartSOPC NIOS IP core, Zhou Ligong FPGA experimental box IP core
FFTVHDl
- 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
crc_accelerator
- CRC 的Nios的软核处理，系统采用Altera Nios IP核进行CRC算法，算法运行时间比常规CRC校检节省很多。-CRC' s Nios soft-core processing, the system uses Altera Nios IP core for CRC algorithm, algorithm running time than the conventional CRC checkout save a lot.
TERASIC_Binary_VGA_Controller
- 友晶公司提供的VGA Controller的IP核设计。针对的是DE2_70开发板。-Friends of the crystal provides the VGA Controller of the IP core design. Development board for the DE2_70.
stratixIII_3sl150_dev_TSE_SGMII_v1
- 该程序实现altera开发板 stratix III 3S150通过以太网与pc之间通信。 使用Quartus II和Nios II 设计。 因为altera官方没有这块板子的正确网卡与pc通信的程序，-Overall This example works at 1000M/100M/10M Base SGMII mode on SIII 3S150 Kit. Designed by Quartus II/IP Cores/Nios II EDS v8.0 This is not
NIOS-IP
- NIOS外围IP使用指南,NIOS外围IP使用指南，NIOS外围IP使用指南-NIOS peripheral IP Guide
NIOS-II-wuxian-IP
- 基于双NIOS II 的IP 无线收发机_july_3.pdf-NIOS II of the IP based on dual transceiver _july_3.pdf
LCD12864
- 基于 NIOS II的LCD12864 IP核设计，有了这个可以直接使用LCD12864-NIOS II of LCD12864 IP-based core design, with this can be used directly LCD12864
nios-2ISP1362
- nios fpga changyong IP Core-nios fpga IP Core
tmp
- NIOS的IP核设计，可以实现针对于RTL8019AS的10兆网络接口控制，可进一步实现FPGA嵌入式网络开发应用-NIOS IP core design, can be achieved for RTL8019AS 10 trillion network interface control, further development and application of FPGA embedded network
自定义PWM IP核，符合avalon总线
- 适合初学qsys、nios者，含tb文件，仿真通过，无bug
CAN-IP
- CAN控制器IP核(可直接在Nios II中使用)-CAN controller IP core (Nios II can be used directly in the middle)
smg_IP
- 在DE 2开发板上，编写vhdl语言，建立8段数码管IP核，在nios ii中编写C语言程序，实现8段数码管数码有规律显示。(In the DE 2 development board, the preparation of VHDL language, the establishment of 8 sections of digital tube IP kernel, in Nios II written in C language program, to achieve the 8 sect
RX_IP_Source
- 串口接收ip核，配合 nios 使用，减少cpu资源开支。(uart receive TX_IP_Source)
TX_IP_Source
- 串口发送ip核，配合 nios 使用，减少资源开支。(uart transmit TX_IP_Source)
chu_ip_drv
- It contains the C driver (.c and .h) files of IP cores in Parts III and Part IV. Since the driver files are not integrated with HAL, the corresponding files must be manually copied to the software application project directory when a core is used i