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SPIsend.rar
- Verilog HDL的程式，上網找到SPI程式， vspi.v這程式相當好用可用來接收與傳送SPI，並且寫了一個傳輸信號測試，spidatasent.v這程式就是傳送的資料，分別為00 66... 01 77...... 02 55這樣的資料，並透過MAX+PULS II軟體進行模擬，而最外層的程式是test_createspi.v！,Verilog HDL programs, Internet find SPI program, vspi.v this very useful progra
EDAteaching
- 系统介绍EDA技术的发展概述，相关概念，VHDL语言、MAX+PULS、QUARTUS的设计方法。-System overview of the development of EDA technology, related concepts, VHDL language, MAX+ PULS, QUARTUS design method.
CPU
- 实现简单CPU功能的源码，可以实现加减乘除和移位功能，VHDL代码，程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended
9999jishu
- VHDL语言编程，7段共阴数码管显示（四个数码管） 其中使用的是进程语句，使用MAX+puls编程。-VHDL language programming, a total of 7 negative digital display (four digits) which is used in the process of language, the use of MAX+ puls programming.
Probe01
- SuperProbe - 17 Function! The Superprobe project was designed to see how much could be done with a PIC chip and just a few parts. The image at the right shows the capacitance measuring mode. This device is designed around a PIC16F870, a 4 d
yuying
- 一个用 MAX puls编写的 语音存储程序，可以直接使用-A speech written by MAX puls stored procedures, you can directly use ~ ~
counterbasedDPWM_D
- 基于计数器的数字脉宽信号调制，用于电力电子设备pwm信号的产生-counter based digital puls width modulator
delayline_b
- 基于延迟线的数字脉冲宽度调制，用于电力电子设备的触发信号产生-puls wide modulator based on delayline