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lpc2132mydemo
- lpc2132演示程序,同样是\"基于硬件FIFO和缓冲队列的\"串口收发演示，-lpc2132 demo program, it is also a "hardware-based buffer FIFO Queue and the" serial transceivers demonstration
FIFO_8_8
- FIFO先进先出队列，一种缓存、或一种管道、设备、接口（Verilog HDL程序,内附说明）-FIFO FIFO queue, a cache, or a pipeline, equipment, Interface (Verilog HDL program, containing a note)
fifo
- 这是一个串口通信的队列,单片机和电脑之间，单片机和单片机之间只要简单的调用函数就可以了。-This is a serial communication queue, single-chip computer and between computers, between single-chip MCU and a simple function call it.
fifo
- 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现先进先出的队列。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 Development Board to achieve FIFO queue.
DSP2812FIFO
- DSP上实现 软件FIFO队列 提高SCI的数据缓冲能力-DSP to achieve the software improve the SCI data FIFO queue buffering capacity
lpc2132_dome
- lpc2132演示程序,同样是基于硬件FIFO和缓冲队列的串口收发演示-lpc2132 demo program, also is based on the hardware and buffer queue FIFO serial transceiver demo
FIFO
- 先入先出队列(First Input First Output，FIFO)这是一种传统的按序执行方法，先进入的指令先完成并引退，跟着才执行第二条指令。-FIFO queue (First Input First Output, FIFO) which is a traditional sequential execution method, first enter the command to finish and retire, only to follow the implementatio
queue
- 完成FIFO功能：the first element added to a queue will occur in the first place in the queue, the second element added to the queue will be after the first one-a kind of First-In-First-Out (FIFO) data structure，the first element added to a queue will occ
FIFO
- FIRST IN FIRST OUT Q-FIRST IN FIRST OUT QUEUE
51-FIFO
- 51单片机的FIFO(先入先出)循环队列实现-51 single-chip FIFO (first-in, first-out) circular queue to achieve
FIFO
- 多个队列的读写，多线程不同队列同时读写，keil4，VC6.0平台运行通过，移植方便-Multiple queues to read and write multi-threaded queue read and write, keil4, VC6.0 platform run by transplant
2440-Queue
- 2440开发板UART串口FIFO程序，模拟2440串口硬件自带的64字节的FIFO-2440 development board serial UART FIFO program to simulate 2440 serial hardware comes with a 64-byte FIFO
fifo
- 软件模拟FIFO队列，实现了队列的初始化，读写操作以及查看队列占用情况和可用空间情况。uCOS下测试通过，其中的数据类型定义没有添加，请使用者按照芯片自行定义。-FIFO queue simulation software to achieve the initialization of the queue, read and write operations, and view the queue occupancy and available space situation. uCOS un
grey-code--FIFO-IP-core
- 基于格雷码的FIFO的IP核，调试可用于通信接口的队列传输。-Gray code based on FIFO IP core, debugging can be used for communication queue transmission interface.
FIFO-Software-Realization
- 通过C语言实现队列，避免数据处理过程中的冲突问题。-Through the C language to achieve the queue, avoid conflict problem in data processing.
FIFO-queue-using-a-DPRAM
- FIFO queiue using DPRAM goog project
FIFO
- First Input First Output的缩写，先入先出队列，这是一种传统的按序执行方法，先进入的指令先完成并引退，跟着才执行第二条指令。-The abbreviation of the first input first output, the first in first out queue, which is a traditional sequential execution method, first enter the command to finish and retire
Synchronous FIFO
- 用16*8 RAM实现一个同步先进先出（FIFO）队列设计。由写使能端控制该数据流的写入FIFO，并由读使能控制FIFO中数据的读出。写入和读出的操作由时钟的上升沿触发。当FIFO的数据满和空的时候分别设置相应的高电平加以指示(mplementation of a synchronous first in first out (FIFO) queue design with 16*8 RAM. A write FIFO that controls the data stream by writi
ByteQueue
- 队列缓冲区设定模块，可用于串口、按键、AD等需要较大缓冲区的工程(A queue buffer setting module, which can be used for a project with a larger buffer, such as serial ports, keys, AD, etc.)
（FIFO）串口接收和发送
- 使用stm32的串口实现fifo队列缓冲读写数据，值得新手学习(Using STM32 serial port to realize FIFO queue buffer read and write data, it is worth learning by novice.)