搜索资源列表
verilog fft_64_12
- radix-4,利用cordic算法实现复乘单元
fft-arm.zip
- 一个用于ARM的基4/基5定点FFT算法，原作者是JDB，后来我扩展过16和256点的计算并用在项目中了，感觉速度还不错。现在重写了基于Linux GCC4的测试程序，可供使用者评估参考。建议安装FFTW3用来精确评估测试结果，相关范例已经在代码中了。,Radix 4/5 FFT routines supporting 16/64/256 and 20/80 calculations. The source originally contributed by JDB, I had extende
fft_1024_hdl
- 一个 1024 点 FFT ， 基 4 蝶形运算架构， 5级流水，乒乓内存，有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
fft_hdl
- 一个 16点 FFT 用基2蝶形运算单元完成，有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
ADSP-21062_Compl_FFT_rad-4
- 用ADSP21062实现快速FFT基4算法 压缩包内有源代码和说明-In general, a radix-4 FFT will run faster than radix-2 FFT but will take up more space and has more restrictions on the length of the FFT. Specifically, all radix-2 FFT routines will take data lengths that are
Radix-4FFTforTMS320C6000
- 用TI DSP芯片TMS320C6000实现FFT算法 内含程序代码和说明 The radix-4 FFT-Fixed-point digital signal processors (DSPs) have limited dynamic range to deal with digital data. This application report proposes a scheme to test and scale the result output from each
DSPFFT
- 介绍了基2时域抽取法FFT的原理和算法,并在MATLAB仿真软件的辅助下、在数字信号处理 DSP上实现。 -Describes the radix-2 time-domain extraction principle and FFT algorithms, and the aid of MATLAB simulation software, in digital signal processing DSP to achieve.
cfft4
- fft radix-4 VHDL for expanding to any fourier transform
cfft4X12
- fft radix-4 for expanding to any fourier transform
FFT_Implementation_in_FPGA
- This book is ERICSSON documentation "FFT, REALIZATION AND IMPLEMENTATION IN FPGA". Book includes some theoretical information about FFT Radix-2 and Radix-4, and also VHDL and Matlab code.
Radix-4-FFT
- Radix-4-FFT的DSP实现，比起Radix-2-FFT来说，它的运行速度更快，效率更高，实时性更好。-Radix-4-FFT in the DSP to achieve than Radix-2-FFT, it s faster, more efficient, and better real-time.
cFFT
- CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be differen
butt_dit_r2
- buuterfly Radix 2 FFT
FFT
- The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 64-point FFT in VHDL. Radix 2 Decimation in Frequency i am found of it.It s really very good!
gam3
- FPGA Implementation ofLow Power 64-Point Radix-4 FFT Processor for OFDM System
gam5
- FPGA Implementation ofLow Power 64-Point Radix-4 FFT Processor for OFDM System
gam7
- FPGA Implementation ofLow Power 64-Point Radix-4 FFT Processor for OFDM System
High-Speed-FFT
- 优秀硕士论文，课题采用现场可编程门阵列((FPGA)，设计实现了一种超高速FFT处理器。目前，使用FPGA实现FFT多采用基2和基4结构，随着FPGA规模的不断扩大，使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中，以基2-FFT搭建基16-FFT的运算核，合理安排时序，解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式，使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096
datasheet
- Implementing the Radix-4 Decimation in Frequency (DIF) Fast Fourier Transform (FFT) Algorithm Using a TMS320C80 DSP