Here is a Fifo impementation in vhdl with a 8 bit input and 8 bit output, reset and a synchronisation for reading and writing with different clocks

Generator of composite synchronisation TV signal on Altera DE2-35 board.

DCF-synchronized Digital Clock for RS232 communication on a 2313-Experimental-Board, Version 0.2 as of 12.01.2001 Features: XTal driven digital clock for exact date and time formation, adjusted and read over a SIO-I/O 9k6 8N1connection, Self-adjustin