搜索资源列表
ic_synthesis_based_ARM_labs
- synopsys 开发的针对cortex-m0入门kit的实现实验 -lab form synopsys for cortex_m system design kit synthesis
cortex_m0_mcu_system_synopsys
- cortex m0 mcu system synopsys verilog code
VCS
- vcs介绍使用方法 介绍如何具体使用synopsys公司的软件(VCs describes the use of the method)
verilog add4
- 分两部分,基于verilog的四位和八位加法器设计,用synopsys的VCS仿真工具进行功能仿真,掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic makefile writing and Linux.)
1
- curcuit simulation in Hspice
SystemVerilog_Synopsys
- systemverilog introduction by synopsys
DC Synopsys Workshop
- Design Compiler 工作台教程文档 操作手册(Design Compiler Workshop Tutorial Document Operation Manual)