搜索资源列表
counter
- 这是用VHDL设计的十进制计数器，两个VHDL程序分别说明了out和buffer的区别-It is designed with VHDL decimal counter, the two VHDL procedures were illustrated the difference between out and buffer
FPGA-DSP
- vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信-vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP
Practica_3
- SP converter in vhdl and counter and buffer
Rom_Control_FPGA
- 用VHDL语言写的ROM控制器，对于编写BUFFER的同志可以用来参考。具有一定价值。-Written in VHDL language using ROM controller, for the preparation of the comrades BUFFER can be used for reference. Has a certain value.
FIFO24_psconv
- fifo buffer vhdl code
FIFO_ise11migration
- fifo buffer vhdl code
atapi_ctl_2_5
- fifo buffer vhdl code
atapi_ctl_2_6
- fifo buffer vhdl code
lab1(mka)
- RGB vga driver for manipulating the colours of a given image buffer. The code has beeen written in vhdl
Program3
- 用 vhdl 语言设计 8 位数码扫描显示电路，显示输出数据直接在程序中给出。增加 8 个 4 位锁存器作为输出显示数据缓冲器，由外部输入8个待显示的十六进制数。-Design with vhdl language display 8-bit digital scanning circuit, display output data are given directly in the program. Increased eight 4-bit latch display data buffer
DE2_115_CAMERA
- d5m的DE2驱动Verilog HDL -d5m driven on DE2 by Verilog HDL
circular-_buf
- Circular buffer VHDl implementation
Altera_VHDL
- this is vhdl code. and, or, buffer gate code device is altera cyclone2.
MP3-coder
- In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read t
fifo
- FIFO缓存器的设计及VHDL测试平台代码-FIFO buffer design and VHDL testbench code
shuangxiangbuffer
- 此程序描写的是双向缓冲器，用VHDL语言描写它的功能，供同学们参考-This program descr iption is bidirectional buffer, using VHDL language to describe its function, the reference for students
tx_buffer_inband
- FPGA,TX发送模块VHDL程序。-tx buffer inband VHDL
buffer_tri_state
- Buffer tristate in vhdl
PPRAM-test
- 乒乓缓存，用vhdl编写，用fpga内部ram-Ping-pong buffer, using vhdl to write,
VmodCAM_Ref_HD Demo_13
- This project has dependencies in the 'digilent' VHDL library. For your convenience a local copy of these dependencies are included in the remote_sources directory. The VmodCAM_Ref_HD demo project was built around an Atlys+VmodCAM setup. The proj