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  1. electric-8.08

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  2. The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including: * Custom IC layout * Schematic Capture (digital and analog) * Textual Languages such a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-06-08
    • 文件大小:14.67mb
    • 提供者:杨晓斐
  1. dsp_builder

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  2. Dsp Builder是一种将Matlab算法描述的语言,转换为硬件设计语言的工具。在VLSI和ULSI技术环境下,对于快速开发具有很大的帮助-Dsp Builder is a Matlab algorithm will be described in the language into hardware design language tools. In the VLSI and ULSI technology, environment, for the rapid development o
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-07
    • 文件大小:1.82mb
    • 提供者:qing
  1. Research_proj

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  2. This document consists of the Latest reasearch concepts for the masters in vlsi
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-26
    • 文件大小:38.96kb
    • 提供者:venu
  1. VLSI

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  2. [電子書籍]利用verilog硬體程式語言來設計大型積體電路的經典書籍 "Digital VLSI Design with Verilog" 由淺入深值得一看 -[E-books] verilog hardware descr iption language used to design large-scale integrated circuit classic books " Digital VLSI Design with Verilog" Deep and worth
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-17
    • 文件大小:4.82mb
    • 提供者:林員外
  1. IVLSIC01

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  2. vlsi project ieee 2006 with doc and source code
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-19
    • 文件大小:4.96mb
    • 提供者:susheel
  1. crossnoise-R5

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  2. In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem affecting circuit reliability. Even though FPGAs are more immune
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:595.39kb
    • 提供者:sia
  1. 038736837X

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  2. Modern Circuit Placement: Best Practices and Results describes advanced techniques in VLSI circuit placement which is one of the most important steps of the VLSI physical design flow. Physical design addresses the back-end layout stage of the chip de
  3. 所属分类:SCM

    • 发布日期:2017-06-03
    • 文件大小:14.48mb
    • 提供者:朋友
  1. LDPC

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  2. VLSI LDPC Soft bit flipping decoder
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-02
    • 文件大小:249.48kb
    • 提供者:vijay
  1. VLSI

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  2. CRC并行16位计算,十分强大,十分好用-CRC parallel 16-bit computing, is very powerful, very easy to use
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-06
    • 文件大小:1.45mb
    • 提供者:zh
  1. atalanta

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  2. 基于stack-at fault的超大规模数字集成电路自动测试向量生成算法(ATPG)。输入.bench格式,输出测试向量。-Automatic test pattern generation (ATPG) algorithm for VLSI circuits
  3. 所属分类:SCM

    • 发布日期:2017-03-28
    • 文件大小:232.24kb
    • 提供者:Roger
  1. codes

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  2. EFFICIENT VLSI ARCHITECTURE FOR VIDEO TRANSCODING PROCESSING ELEMENT
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:35.36kb
    • 提供者:prasanna
  1. CMOS_VLSI

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  2. A Designer’ cmos vlsi design 2ND Edition
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-06-22
    • 文件大小:38.44mb
    • 提供者:prasanna
  1. vlsi-fft-finiteword

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  2. 超大规模集成电路中FFT处理器设计中的有限字长影响分析,并比较了基2DIT和DIF算法的性能特点;-VLSI FFT processor design of finite word length effects, and compare the base 2DIT and DIF algorithm performance characteristics
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:393.43kb
    • 提供者:wang gang
  1. DES3DES_VLSI

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  2. 优秀硕士论文:DES3DES算法的VLSI设计.pdf-Outstanding Master' s Thesis: DES3DES VLSI design algorithms. Pdf
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-08
    • 文件大小:1.53mb
    • 提供者:dawei
  1. 0321269772--CMOSdesign

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  2. CMOS Design VLSI Design hand book
  3. 所属分类:SCM

    • 发布日期:2017-06-14
    • 文件大小:19.62mb
    • 提供者:saj
  1. VLSI-Digital-Signal-Process

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  2. 这是一本介绍超大规模集成电路设计的书籍,相信会有帮助-This is an introductory VLSI design books, I believe will be helpful
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-06-10
    • 文件大小:16.34mb
    • 提供者:renee
  1. VLSI-Architectures-for-Discrete-Wavelet-Transform

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  2. VLSI architecture and VHDL codes for 1D and 2D DWT and IDWT schemes.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:951.83kb
    • 提供者:Sameet A. Khan
  1. VLSI-FINAL-MANUAL

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  2. vlsi manual helps to engineering students for vhdl codes of some practicals
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:128.83kb
    • 提供者:malhar
  1. retiming

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  2. 这篇文章讲述了register retiming技术.这项技术是设计VLSI必须要掌握的技能,另外在基于FPGA设计中,register retiming可以使系统频率上升,提高吞吐量。-This paper describe a register retiming mode for VLSI and FPGA-based design. This mode adopted for design can enhance system throughput and increase system
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:364kb
    • 提供者:salvary
  1. Algorithms-And-Data-Structures-In-VLSI-Design

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  2. algorithm in vlsi and data structure book
  3. 所属分类:SCM

    • 发布日期:2017-04-09
    • 文件大小:1.44mb
    • 提供者:Jyoti Garg
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