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PLL
- DP256_HCS12_PLL锁相环驱动程序
mb1504_TEST_MSP430.rar
- 运用MSP430驱动锁相环MB1504的程序，IAR编译。能够实现8—60Mhz频率范围精确锁定，步进为10khz,Use MSP430-driven PLL MB1504 procedures, IAR compiler. Be able to achieve 8-60Mhz frequency range precision locking, stepping to 10kHz
LPC2103_PLL
- EARYARM7_LPC2103最小系统板PLL锁相环测试程序，编程环境ADS1.2-Minimum System EARYARM7_LPC2103 board phase-locked loop PLL testing procedures, programming environment ADS1.2
diy1
- 单片机控制ADF4113锁相环芯片程序。-ADF4113 PLL chip microcomputer control procedures.
EX10-PLL
- \Keil_ARM 基础实验Examples 锁相环 程序 实例-\ Keil_ARM basis of experimental phase-locked loop program example Examples
3.2_SetPLL
- 流明ARM开发板设置PLL锁相环时钟示例程序，可以直接在IAR编译器上运行使用。-Lumens ARM development board PLL set phase lock loop clock example program, can direct IAR compilers run use.
AN2865
- 本文包括飞思卡尔MPC5500 and MPC5600 系列MCU编程例子，例如时钟控制、增量器、锁相环和中断程序等。对使用这类MCU有非常重要的帮助-This application note contains software examples to use when getting started using MPC5500 and MPC5600 family devices. Complete code is available for downloading to t
ADPLL
- verilog语言编写的fpga的全数字锁相环ADPLL程序-Verilog language FPGA all digital phase-locked loop ADPLL program
dpll3
- 数字锁相环 VERILOG语言编写的基于FPGA平台的PLL程序-VERILOG language based on the FPGA platform PLL program