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simulator
- 开源的基于SystemC的模拟器,可以模拟ARM CPU, Cache, DDR,NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is
jamcpu
- jam CPU模拟器的设计与实现.其中包含设计文档-jam CPU Simulator Design and Implementation. which includes design documents
sesc
- 目前国际上研究体系结构最常用的微处理器模拟器sesc源代码-source code of the most popular simulator for cpu design