搜索资源列表
SerivalPC1
- 用VHDL编写的单片机与串口的通信，通过调试，波特率为9600，在串口调试助手能看到相应的结果-Prepared with the VHDL serial communication between MCU and, through the commissioning, the baud rate is 9600, the serial debugging assistant can see the results of the corresponding
uart_flash
- 实现UART对flash的控制，利用串口调试助手-UART control of flash to achieve
ps2verilog
- 本程序实现了基于FPGA的PS2键盘控制器，主机即FPGA读取键盘的键码然后解码输出到上位机（串口调试助手）显示，用户友好，调试方便，-This program implements the PS2 keyboard controller based on FPGA, the FPGA reads the keyboard master key code and then decode the output to the host computer (serial debugging assis
uartrxto
- STC12LE5A32S2单片机的串口驱动函数，该驱动函数可以实现收发字符串的功能，同过串口小助手发送字符串，然后又接收回所发送的字符串。-STC12LE5A32S2 microcontroller serial port driver functions, the driver can send and receive function string function, with his assistant to send a string over the serial port, and
UART
- sep4020开发板uart模块的驱动程序，使用串口0，在串口调试助手上显示prochip-uart driver module development board sep4020, serial 0, serial debugging assistant prochip
uart_rx_tx
- 基于sp605开发板的一个串口收发程序。包含了所有ise产生的完整的文件（ucf等），通过串口调试助手测试通过。共有四个模块构成。-Program based on the the sp605 development board serial transceiver. Contains all ise complete file (ucf etc.), by serial debugging aides tests. A total of four modules.
ps2_keyboard_test
- FPGA通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。需要接键盘，还要用调试助手，下载程序后，在键盘上按下一个键，比如A，则在PC调试助手上可看到A-FPGA received by ps2 keyboard data, and then received the letters A through Z keys to convert the corresponding ASII code, sent through the serial po
ISE-chuankou
- 基于FPGA的串口通讯程序，用VHDL语言编写，用ISE平台编译，并且用串口调试助手和PC机通讯准备无误！-FPGA-based serial communication program using VHDL language, compiled with ISE platform, ready to correct and serial debugging aides and PC communication!
uartverilog
- FPGA与上位机通过串口调试助手进行串口通信，回发传过来的数据-FPGA and host computer through the serial port debugging assistant serial communication, and pass over the data postback
09_uart2
- 串口字节收发通信，可以从PC机上通过串口调试助手输入一个字节然后从串口调试助手的接收区查找你输入的字节-Serial bytes to send and receive communication from the PC through the serial port debugging assistant enter a byte and then find your input bytes from a serial debugging assistant reception area
my_uart
- 数据收发器，串口模块，可使用串口调试小助手来进行数据收发，验证模块的功能-Data transceiver, serial module, you can use the serial port to debug his assistant to send and receive data, verify the functionality of the module
verilog_uart
- verilog实现串口的调试，用串口调试助手验证通过。-verilog serial debugging and validation by serial debugging assistant.
uart_tx
- 在SP605开发板上实现了串口的发送程序，并且通过验证。可以通过串口调试助手进行测试！-SP605 development board serial transmission program, and validation. Tested by serial debugging assistant!
uartverilog
- FPGA串口通信，已在FPGA实验板上用串口调试助手实验成功，可以硬件实现。-FPGA serial communication experiment was a success in the FPGA board serial debugging assistant, can be implemented in hardware.
VHDL_uart
- 用xilinx的FPGA-spartan3E实现uart，固定波特率9600，偶校验，系统时钟50MHz，能够实现将从串口调试助手发送到FPGA的数据重新发回串口调试助手-using xilinx s FPGA-spartan3E to implement uart with a baudrate of 9600, even parity check. The system frequency is 50MHz.It can turn the data from serial assistant
yibuchuanxingjiekou
- 能进行异步全双工串行通信的模块，该模块以固定的串行数据传送格式收发数据。每帧数据共10 位，其中1 位启动位，8 位数据位，1 位停止位。模块发送的数据由PC 端的串口调试助手接收，要求能发送数字和中文（一首古诗，在FPGA内采用ROM 的方式存储中文内码），并能进行切换。模块接收PC 端串口调试助手发送的16 进制数据，可按10 进制方式显示到LED 上。-Asynchronous full-duplex serial communications module can be performe
ps2
- 使用PS2的键盘，向键盘输入字符，通过串口通讯，把字符显示到电脑上（过程需要使用到串口调试助手）-Using the PS2 keyboard to keyboard input characters via the serial port, the characters are displayed on the computer (process requires using the serial debugging assistant)
10_ps2_keyboard_test
- FPGA通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。 实验时，需要接键盘，还要用调试助手，下载程序后，在键盘上按下一个键，比如A，则在PC调试助手上可看到A -Through FPGA receive the ps2 keyboard data, and then receive the letters from A to Z key value into corresponding ASII code, through A seri
uart_serial_vhdl
- fpga例程：用实fpga现uart串口通讯的vhdl详细代码，附一个串口通讯助手小插件-fpga routines: solid fpga vhdl now uart serial communication code in detail, with a small plug-in serial communications assistant
uart
- 基于FPGA的UART程序设计，VERILOG HDL语言编写，可实现串口通信，波特率为115200。已通过串口调试助手验证。-FPGA-based UART program design, VERILOG HDL language, enabling serial communication baud rate to 115200. Has been verified through the serial debugging assistant.