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tongxin
- 串口与电脑的通信 可以用调试助手 进行试验 采用verilog语言设计 编译已通过-Serial communication with the computer test can be used with debugging assistant compiled verilog language design has passed
uart
- 利用串口调试助手是实现pc机和fpga的串口通信功能，程序附注释。-Debug Assistant is achieved using serial pc machine and fpga serial communication function, the program annotated.
my_uart_top
- 实现的功能如题，就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。使用的是串口UART协议进行收发数据。上位机用的是老得掉牙的串口调试助手-To achieve the functions such as title, that is, to achieve FPGA receives data from the PC, and then receive data back fat. Using a UART serial port protocol to send and recei
uart_tx_rx
- 该工程用verilog编写，已通过串口调试助手调试通过，接收模块采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complet
x3cs400_uart
- 基于X3cS400的串口通讯程序，开发环境ISE7.0，使用verilog编写。可以使用串口调试助手在pc机上查看字符。-UART communication program based on X3CS400 FPGA， develop enviroment： ISE7.0，completed by verilog。 The result could be seen on the Uart debug assitant.
IS61WV51216BLL
- 备注：使用的是VeriLog HDL语言 软件环境xilinx ISE 10.1，硬件：高教仪EXCD-1FPGA电路板。FPGA信号：spartan-3e . 功能编写硬件描述性语言实现FPGA对板上外设SRAM IS61WV51216BLL的读写，通过串口发送到上位机上，使用串口助手显示读取的数据。-Note: Use the VeriLog HDL language software environment xilinx ISE 10.1, hardware: Higher M
RS_232
- VHDL实现RS232串口通信，压缩包内有完整的quartus2工程，由顶层，波特率，发送，接收四个模块构成。外部电路只需要一片MAX232就能与串口助手或单片机通信。-VHDL implementation of RS232 serial communication, compressed within a complete quartus2 project from the top, baud rate, send, receive four modules. External circui
UART
- 基于FPGA的串口程序 由VHDL语言编写，通过串口助手实现数据的发送与接收-FPGA-based serial procedures by VHDL language and sending and receiving data through the serial port assistant
serial
- 基于FPGA的串口通讯,能够实现串口助手给fgpa发送16进制的数字，FPGA也能够向串口调试助手发送数据-Based on FPGA, serial port communication can realize serial assistant send fgpa hexadecimal Numbers, the FPGA can also send data to serial debugging assistant
09_uart2
- PC机上开串口调试助手，发送一个字符到开发板（中间通过串口线相连） FPGA收到字符后，回发给PC机上，在串口助手上显示-Open on the PC serial debugging assistant, send a character to the development board (the middle line connected through the serial port) FPGA received character, sent back to the PC, is d
uart
- PC机上开串口调试助手，发送一个字符到开发板（中间通过串口线相连） FPGA收到字符后，回发给PC机上，在串口助手上显示 -Open the PC serial debugging assistant, to send a character to the development board (middle connected by a serial line) After the FPGA received character is sent back to the PC, is
Uart
- FPGA verilog UART串口通信,可通过RS232串口与串口助手通信。-FPGA verilog UART communication, it could connect with UART assistor with RS232 port.
UART_rec
- 用Verilog语言写的串口接收程序。通过串口助手发送数据，在数据输出端可以看到发送的数据。（需要自己分配FPGA引脚)-Verilog language used to write the serial receiver. Send data through the serial port assistant. It can be seen at the data output terminal of the data transmission. (Need to assign your ow
usartV1.2
- 基于Verilog实现串口通讯，通过串口调试助手可测试(Serial communication based on Verilog, through the serial debugging assistant can test)
用串口DMA方式接收发送数据
- 在STM32板子与电脑串口助手进行通信,用串口的DMA方式,先接收,再发送到PC端,可以连续接收,通过按键一次发送.(In the STM32 board and computer serial assistant for communication, using the serial port DMA way, first receive, and then sent to the PC terminal, you can receive continuously, sent through
ex8_232
- 这是一个用于自收自发的uart通讯代码，包括波特率设置模块、uart收发模块，上位机使用串口调试助手(Uart module is used to communite with PC in the way of spontaneous collection, including buad setting and transceiver. Upper computer is serial debugging assistant.)
rx_uart_led
- Altera FPGA 设计串口通信，实现串口助手发数控制电路板小灯亮灭(Altera FPGA design serial communication, serial assistant to achieve the number of control circuit board, small lights out)
FPGA_UART
- 代码已通过实验测试，实现串口助手在线调试(The serial debug of the serial port of UART is realized through FPGA. The result is very successful after testing.)
28_ad9226_test
- 此程序完成了的双路数据的采集，通过ad模块将模拟数据转化为12位数字信号，并通过串口发送在pc端的串口助手中显示(This program has completed the acquisition of dual data. Through the ad module, the analog data is converted into 12 bit digital signals and is sent to the serial port assistant at the PC side
teacher_uart
- 由verilog编写的uart收发模块，能够在串口助手发送字符，并在数码管上显示，开发板为basys3 内置约束文件(The UART transceiver module written by Verilog can send characters to serial assistant and display them on the digital tube. the development board is built-in constraint file of basys3)