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traffic_lights
- Verilog语言3个程序，包括4位二进制的BCD码加法器，ALU位片，交通信号灯。既有源码也有word文档说明。-Verilog language three procedures, including 4-bit binary code of the BCD adder, ALU-bit chip, traffic lights. Only source documents that have word.
Bin2Grey
- 一个用Verilog语言实现的二进制码到BCD码的一种转换方法的实现。包含工程文件和实现文档。-Verilog language implementation with a binary code to BCD code conversion method as a realization. And the achievement of the document contains the project file.
multipler3
- 一个用Verilog语言实现的三位二进制选举法。包含工程文件和实现文档。-One with the Verilog language implementation of the three binary electoral law. And the achievement of the document contains the project file.
compare8
- 一个用Verilog语言实现的八位二进制数比较器。包含工程文件和实现文档。-One with the Verilog language implementation of the eight binary comparator. And the achievement of the document contains the project file.
divider
- 四位无符号二进制除法器的设计,这是整个的工程文档，应该对大家有用-4 unsigned binary division Design
yi-wei-er-jin-zhi-quan-jia-qi
- 一位二进制全加器的源代码及详细WORD文档，maxplus软件运行，管脚已配置完成，芯片为EP1K30TC144-3-A binary full source code and detailed documentation WORD, maxplus software running, pin has been configured, EP1K30TC144-3