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rake_mrc
- 实现RAKE接收机的最大比合并准则，输入位宽16比特。
TheGuideLineOfDesignFPGA
- FPGA设计的指导性原则，阐述了FPGA开发过程中的一些重要的准则，有很强的参考价值-FPGA design guiding principle of the FPGA development process a number of important criteria for a strong reference value
The_Ten_Commands_of_Excellent_Design
- 介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处-Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary
Rake_Receiver
- 用Verilog HDL语言实现一个Rake接收机的最大比合并准则，其中3路输入数据是并行相关输出-Verilog HDL language with a Rake receiver maximum ratio combining criteria, of which 3 related to the parallel input data is output
FPGA设计指导准则
- FPGA设计指导准则 (FPGA design guidelines)