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jianpankongzhi
- 键盘控制米字管显示十进制,这是用MAXPLUS2做的仿真的全部文件。里面包含的仿真的全部结果-Keyboard to control the word-meter display decimal
BCD
- vhdl写的十进制转BCD的源代码-vhdl decimal to BCD written the source code~~~~~~~~~~~~~~~~~
EDA_project
- 基于Verilog和VHDL的DDS程序 基于VHDL的8位十进制频率计 -Verilog and VHDL based on the DDS process VHDL-based 8-bit decimal Cymometer
shuzipinlvjiVHDL
- 功能:频率计。具有4位显示,能自动根据7位十进制计数的结果,自动选择有效数据的 --高4位进行动态显示。小数点表示是千位,即KHz-Features: frequency meter. With four shows that will automatically count 7 the results of the metric system to automatically select a valid data - 4 high-dynamic show.
8wei
- 一个8位的十进制频率计数器,精度还不错。-An 8-bit frequency counter decimal precision is also good.
CNT10B
- 十进制精确计数,经典写法,便于学习与参考,供大家分享-Decimal precision counts, classic written, easy learning and reference for all to share
Seven-Segment-Decoder
- 用VHDL语言在FPGA上实现将十进制bcd码转换成七段led显示码-FPGA using VHDL language to achieve will be converted to decimal bcd yards led seven segment display code
2cout10
- 二位十进制计数器,详细的代码和仿真,并且有VHDL代码和原理图设计-2 decimal counter, the detailed code and simulation, and has VHDL code and schematic design of
DDS
- VHDL经典设计 十进制 VHDL 频率计-VHDL classic design metric VHDL frequency counter
shuzizhongsheji
- s1. 所设计数字钟具有“时”、“分”、“秒”的十进制数字显示(小时从00~23)。 2. 可以进行手动校时、校分功能。 3. 能进行整点报时。从59分51秒开始每隔2秒钟连续发出四次低音“嘟。嘟、嘟、嘟”,,最后一次发出高音“嗒”。此信号响起时即达整点。 -you can see see
h
- 用VHDL硬件编程语言实现两位十进制数的四则运算,对VHDL语言的学习有进一步的认识。-VHDL hardware programming language used to achieve two decimal numbers 4 operation, the VHDL language, learning and further understanding.
counter10
- 这是一个十进制的计数器哦,是用vhdl语言开发出来的 是一个不错的十进制计数器-This is a decimal counter Oh, is vhdl language developed is a good decimal counter
reg4b
- 这是一个4位的锁存器 一般适用于4位十进制计数器上-This is a 4-bit latch generally apply to 4-bit decimal counter
COUNT60M
- 六十进制计数器,带进位输出,很简单,基本实现啦所要求的功能-6 decimal counter, into the digital output, is very simple, basic functionality required to achieve啦
cal
- 设计一个十进制计数器,由0到9进行循环计数,同时将计数结果通过数码管显示出来-Design of a decimal counter, from 0 to 9 for cycle counting, while counting resulted in the adoption of digital tube display
frequencyZDC
- 有效位为四位十进制数的数字频率计,实验板上有一个标准时钟发生电路,为计数闸门控制电路提供一个标准8Hz信号,计数闸门控制电路控制4位十进制计数器从第三秒开始计数一秒钟,计数的个数就是待测输入信号的频率。第四秒停止计数,其中前7/8秒保持计数值,后1/8秒计数器复位。然后再计数一秒,保持计数值一秒,如此循环。-Digital frequency meter
VHDLscounter
- 通过VHDL自行设计的一个秒表共有4个输出显示,分别为、十分之一秒、秒、十秒、分,所以共有4个计数器与之相对应(3个十进制计数器,一个6进制计数器用来对十秒进行计数),整个秒表还需有一个复位信号和一个精确的10HZ时钟信号。-Of a self-designed by VHDL stopwatch showed a total of four outputs, namely, one-tenth of seconds, seconds, ten seconds, minutes, so a to
Frequencycounterprogramdesignandsimulation
- 频率计。具有4位显示,能自动根据7位十进制计数的结果,自动选择有效数据的-Frequency counter. With 4-bit display that can automatically count the results of seven decimal automatically select a valid data
BCD8
- BCD码十进制8位加法器,采用超前进位的方法-8-bit decimal BCD adder yards, using look-ahead approach
cnt4_10
- 用VHDL在FPGA开发板上实现4位十进制计数器 -Use VHDL to achieve 4-bit decimal counter