搜索资源列表
PIPELINE_MUL_ADD
- 利用2個加法器及2個乘法器加上平行化處理來實現
parall_ad_da
- 在和众达SEED—XDTK平台上,基于XC4VSX25的 平行模数,数模转换程序-In and Jones SEED-XDTK platform, based on the parallel XC4VSX25 modulus, digital-analog conversion process
digital_lock
- 数字锁即电子密码锁。锁内有若干密码,所有的密码可以用户自己设定。数字锁有两类: 一类是平行接收数据,称为并行锁;一类是串行接收数据,称为串行锁。如果输入代码与锁 内密码一致,锁被打开;否则,应封闭开锁电路,并发出报警信号。-Digital lock or electronic lock. There are a number of lock password, all passwords can be user set. Digital lock there are two ty
fir
- 利用系数奇对称的性,节约一半乘法器资源,实现平行FIR滤波器的功能。-The function of parallel FIR filter is realized by using oddly symmetric coefficients and saving half of the multiplier resources.