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UART_ise7_bak
- 用FPGA 实现全双工异步串口（UART），与PC 机通信。1 位起始位；8 位数据位；一个停止位；无校验位；波特率为2400、4800、9600、11520 任选或可变（可用按键控制波特率模式）。-using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,48
yibuchuanxingtongxinshili
- 异步通信串行口设计实例 做异步串行通信的可以用来参考一下-asynchronous serial communication design examples do asynchronous serial communications can be used to refer to
uart(Verilog)
- uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件
UART vhdl代码
- 基于FPGA的异步串口通信
异步串行口
- 一种基于VHDL语言的实现计算机串行通信的简洁设计
system 完成远程通信的整体任务
- Verilog，QuartusII可正确运行，可下载到FPGA上，完成远程通信的整体任务，PC发数据，键盘输入运算符与运算数计算将结果显示在数码管上并返回给PC机，需异步串口调试软件-Verilog, QuartusII run correctly, can be downloaded to the FPGA, to complete the overall task of remote communication, PC send data, keyboard operators and op
uart.rar
- 基于vhdl的串口通信模块，即异步收发机，可实现单片机核fpga的收发串口通信，遵从rs232协议，已经调试过，很不错的资源,Vhdl-based serial communication module, that is, asynchronous transceiver can achieve single-chip transceiver nuclear fpga serial communication, rs232 to comply with the agreement, has be
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
UART_VHDL
- 异步串口通信VHDL源代码，通过了验证，最高通信速率可达384-Asynchronous serial communication VHDL source code, through the validation, the maximum communication rate of up to 384
80C51_1
- 1.异步通信软件模拟2.基于RS-232的串口通信3.基于RS-485的多机通信4. I2C总线协议的软件实现5. SPI总线在单片机系统中的实现6.-wire-1. Asynchronous communication software simulation 2. Based on the RS-232 serial communication 3. Based on the RS-485 Multi-machine communication 4. I2C bus protocol soft
AVR_Uart
- AVR uart 异步串口通信代码 实现单片机的异步通信-AVR uart code chip asynchronous serial communication Asynchronous communication
UART_Quartus_verilog
- 用Verilog编写的异步串口通信程序，开发环境为Quartus II，具有一定的参考价值。-Written in Verilog asynchronous serial communication program development environment for the Quartus II, with some reference value.
task22constant
- 清华大学电子课程设计：Verilog语言，Quartus可以正确运行，下载到FPGA上可完成PC与FPGA一串数据的连续收发，且实现本地回环，异步串口通信-Verilog language, Quartus can be correctly downloaded to the FPGA to be completed by PC and FPGA transceivers continuous string of data, and implement local loop, asynchron
FPGA-chuankoutongxin
- 实现fpga的串口通信，采用自顶向下的设计方法设计异步串口的ip核-Fpga implementation of serial communication, use of top-down design methods for asynchronous serial ip nuclear
uart.main
- 异步串口通信程序，带时序输出，已经验证过了-Asynchronous serial communication program with the timing of the output has already been verified
example1
- verilog 实现串口通信,其主要针对于uart异步232串口通信，经过硬件验证，其包含众多黑金开发板例程-verilog and uart
uart_rx
- uart通信方式的接受模块，在串口通信uart中，需要记录来自外设的数据，进行采集和时序控制，进行异步的传输。-acceptance uart communication module, serial communication uart need to record data from peripherals, acquisition and timing control, asynchronous transmission.
chuankouchuankoutongxin
- FPGA异步串口通信示例程序，简单的FPGA串口通信接收程序，波特率为9600，采用16倍波特率接受,无奇偶校验位-FPGA asynchronous serial communication example program, a simple FPGA receiving procedures, serial communication baud rate to 9600, using 16 times the baud rate, and white parity bits
wenjian
- 异步串口通信uart Verilog语言编写-Asynchronous serial communication uart Verilog language
ad706_test
- 使用AD7606进行8通道采样，并通过异步串口通信将采样结果传给上位机(Using AD7606 to carry out 8 channel sampling and transmit the sampling results to the host computer through asynchronous serial port communication.)