搜索资源列表
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- vhdl七段数码管显示程序，上机实验过，完全正确-Seven-Segment LED display vhdl procedure on the experimental machine, and absolutely correct
dac
- 0～5伏可调数字电压源，以5伏为基准电压，数码管显示当前电压值，使用VHDL语言实现，程序都加了注释，方便阅读。 -0 ~ 5 V digital voltage source adjustable to 5 V for the voltage reference, digital tube displays the current voltage value, the use of VHDL language, the program notes are added to facilita
clock
- 以前做的EDA课程设计，CLOCK,可设置时间的,6位数码管显示-Done before the EDA curriculum design, CLOCK, may set the time, digital tube display 6
9999jishu
- VHDL语言编程，7段共阴数码管显示（四个数码管） 其中使用的是进程语句，使用MAX+puls编程。-VHDL language programming, a total of 7 negative digital display (four digits) which is used in the process of language, the use of MAX+ puls programming.
EXP4_sec
- 秒表 4个7数码管中的任何一个显示任意按键按下的次数。初始值为0，当计数到9时，下一次数值为0。利用Verilog HDL语言，编程实现上述功能。-Stopwatch
shuzizhong
- 1.计时功能采用24小时方式，显示小时、分钟、秒。 2.采用双键校时法，MODE和SET，前者选择始终模式（包括小时、分、秒校时），后者校时脉冲。 3.结果用6个共阳数码管显示。-1. Time functions the way the 24-hour, show hours, minutes, seconds. 2. The use of double bond at the Law School, MODE and SET, always choose the former mod
DM1_KEYs_LEDs_C5T
- FPGA的键盘和LED显示。详细情况可用QuartusII打开，了解顶层原理图上的文字标注。键1控制计数脉冲，计数显示于数码管和发光管。-the file succeed in making the LEDs changed according to our key.
Dig_Clock
- ep2c8，ep2c8所编写的数字钟程序源码，8位数码管显示-ep2c8 for dig-clock
daima
- 用VHDL语言设计一个8位加法器： 在八位加法器代码一中：加法器是由两个4位二进制加法器U1和U2组成的8位加法器逻辑电路，其中U1用来装载8位加法器中两个加数的低4位，而U2则用来装载高4位。在设计4位加法器时，定义输入信号量CIN、A、B以及输出信号量S、Cout。定义信号量SINT/AA/BB，将加数A和0并置后赋给AA，加数B和0并置后赋给BB，形成5位二进制数，这是为在做加法时发生溢出所做的处理，然后将加数AA与BB以及进位Cin相加赋给SINT，并将SINT的低4位赋给加数和S输
keyboard
- fpga与4*8键盘和数码管结合的测试程序-fpga and 4* 8 keyboard and digital test procedures associated
serial
- 该程序用vhdl 编写，模拟串口工作，对上位机发送数据在串口调试工具下显示，接受上位机数据在数码管上显示-Vhdl prepared to use the program to simulate the serial port work, send data to the PC serial port debug tools in the next showed that IPC data in digital tube display
VHDLCODE
- VHDL的一些典型源代码，有七段数码管译码器，格雷码转换为二进制码，八位数字比较器等等。-Typical VHDL source code, there are Seven-Segment LED Decoder, Gray code is converted to binary code, the eight figures and so on.
shuma0-3
- 利用verilog语言编程 以FPGA为开发工具实现数码管0-3显示！-Verilog language programming to the use of FPGA development tools for the realization of digital tube 0-3 show!
PicoBlaze_Embedded
- xilinx Picoblaze的例子，再PBus总线上挂接了按键模块、VGA输出模块和一个七段数码管显示模块-xilinx Picoblaze example, re-articulated bus PBus the key modules, VGA output module and a Seven-Segment LED display module
pinlji
- 同样是基于altera芯片的简易频率计程序！！用数码管显示-Similarly, based on the simple altera-chip frequency counter program! ! Digital LED display! ! !
Mars-EP1C6-F_code2
- 此包为FPGA学习板接口实验程序源代码,共包括13个实验程序,有7段数码管,1602液晶显示,12864液晶显示,I2C总线,串口通信,拨码开关等.-The packet interface to FPGA board experimental procedure to study the source code, a total of 13 experimental procedure, there are 7-segment digital tube, 1602 LCD 12864 LCD,
hexc_display
- 数码管显示的VHDL程序，自己做实验调出来的-LED display of the VHDL program, tune out their own experiments
show_numbers
- 在八位七段数码显示管上显示8位学号，要显示的学号可以在程序内改。-In the eight seven-segment digital display tube display 8 Student ID, Student ID to be displayed can be changed within the program.