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VHDL-ROM4.基于ROM的正弦波发生器的设计
- 基于ROM的正弦波发生器的设计：1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 ,ROM-based design of the sine wave generator: 1. Sinusoidal waveform generator by the data storage module (ROM), wav
ddfs.rar
- 基本FPGA的DDS信号发生器，可产生1-1MHZ任意频率的三角波，方波，锯齿波，正弦波,Basic FPGA-DDS signal generator, can produce 1-1MHZ arbitrary frequency triangle wave, square wave, sawtooth, sine wave
DDS
- 基于quartus的DDS，可以发生正弦波，方波，三角波，附带了顶层文件，注释在程序中-Quartus on the DDS, can occur sine wave, square wave, triangle wave, with the top-level documents, notes in the procedure
sine-generator
- 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
DDS
- 我们小组共了一个月做的DDS,程序核心用的是Verilog HDL,有仿真波形,输出正弦波,方波,及三角波,步进可调.频率范围1HZ--10MHZ-Our group for a month to do a total of DDS, the procedure is used in the core of Verilog HDL, there are simulation waveform, the output sine wave, square wave and triangular wa
DDS_VERILOG
- verilog dds 在发生正弦波时，很好的参考代码-verilog dds
wavegenerator
- 开发环境为QuartusII，能产生正弦波、三角波、方波和锯齿波，幅度为5V，采样为8位，在开发板已经验证通过，有详细的波形图和管脚分配图。-Development environment for QuartusII, can generate sine wave, triangle wave, square wave and sawtooth wave, ranging from 5V, sampling for 8, in the development board has to verif
dds_vhdl
- dds的vhdl实现,主要包括正弦波、三角波和锯齿波的产生-dds achieve the VHDL, including sine, triangle wave, and the selection ramp
daout-Sine-wave
- 正弦波的vhdl输出，使用VHDL编写的，已经通过调试-Sine wave output of the VHDL, the use of VHDL prepared already through debugging
signal_generator
- 基于vhdl的多功能函数信号发生器的设计，能实现三角波、方波、正弦波。-VHDL-based multi-function signal generator design, can achieve the triangular wave, square wave, sine wave.
VHDL
- DDS产生正弦波（VHDL语言）用DDS产生3MHZ的正弦波,VHDL控制语言-DDS have a sine wave (VHDL language) 3MHZ generated by the DDS sine wave, VHDL control language
wave_generator
- 基于cycloneII的信号发生器，产生正弦波、方波、三角波，人机界面十分友好，可方便地进行波形切换-CycloneII based on the signal generator to produce sine wave, square wave, triangle wave, a very friendly man-machine interface can be easily switched waveform
vhdl_dds
- 利用VHDL语言实现的简易DDS，便于调节正弦波的频率及相位-VHDL language using a simple DDS, easy to adjust the frequency and phase sine wave
dds
- 基于fpga的函数发生器设计通过fpga实现正弦波输出-基于fpga的函数发生器
dds
- VHDL编的CPLD正弦波产生程序用直接数值合成DDS原理驱动dac0832实现正弦波输-VHDL compiled CPLD sine wave generation process by direct numerical synthesis of theory-driven dac0832 achieved DDS sine wave input
dds_vhdl
- fpga VHDL语言，控制DDS产生频率可变的正弦波信号扫频-FPGA VHDL DDS
sine_wave_generator_using_FPGA_implementation
- 该资料介绍了用FPGA实现正弦波发生器，原理是利用内置rom表，通过查询的方式实现输出，然后经过外部DAC输出，频率达到1MHz-The information on the sine wave generator using FPGA implementation, the principle is the use of built-in rom form, by querying the means to achieve the output, and then an external DA
VHDL
- 利用VHDL实现任意函数发生器，包括方波、正弦波、三角波等。-The use of VHDL to achieve arbitrary function generator, including square, sine wave, triangle wave and so on.
SIGNAL_GEN
- 利用EDA的VHDL硬件描述语言设计的函数信号发生器，可以产生递增、递减斜波，三角波，阶梯波，正弦波，方波-The use of EDA, VHDL hardware descr iption language design function of the signal generator can generate increased progressively decreasing ramp, triangle wave, step-wave, sine wave, square wave
dds
- 高精度高速正弦波生成，正弦波相位和正弦波频率可调。-make sin