讲述了全数字信号发生器部分频率值测算的表格-Full digital signal generator frequency value calculation form

用verilog 实现的液晶屏驱动程序，已多次应用于项目中.经测算，性能非常稳定可靠。-Verilog achieve with LCD driver, it has repeatedly applied to the project. After calculation, the performance is very stable and reliable.