搜索资源列表
m
- 由20位移位寄存器线性反馈产生的m序列的vhdl代码-20-bit shift register linear feedback sequence generated vhdl code m
IIR-digital-filter-
- 采用双线性变换法设计IIR数字滤波器设计的c代码,包括低通、高通和带通-Document recording the design of IIR digital filter c code
ParallelSerialMult
- 用verilog代码实现了 并行线性序列乘法器,流水线技术实现了乘法操作-Verilog code using a linear sequence of parallel multipliers, pipeline technology to achieve a multiplication operation
project_11_first_d1_HDMI
- 本代码将TW2867第一通道输出解复用以后进行BT.656格式的解析,然后将奇偶场合并为一帧存入DDR2,读取的时候使用双线性插值算法,将原始的720 x576的分辨率放大到800x600,然后在HDMI口输出。-This code will TW2867 first channel output demultiplexing after parsing BT.656 format, then the parity occasions and as a frame stored in DDR2,