搜索资源列表
Statemachinedesigntechniques
- 老外写的编写有限状态机的书，书中提供的各种技巧，方法对大家肯定很有帮助-The preparation of a foreigner to write finite state machine of the book, the book provides a variety of techniques, methods to be helpful, I am sure you
taxi4
- 本程序是天华杯模拟题中出租车计价器源程序，由本人编写，经测试基本满足要求-This procedure is the day China Cup title in the taxi meter analog source, which I am prepared to meet the basic requirements have been tested
AM_DE
- AM信号解调的FPGA实现。用VHDL编写，验证通过的-discribe the AM,tell you hwo to use it.
UDP_Core
- 本人用verilog编写的UDP协议，经测试可用。-I am prepared to use verilog UDP protocol, the test is available.
sss
- 使用Verilog语言编写源代码.调用一些基本的IP核，如DCM模块、DDS模块ChipScope模块、乘法器模块等来实现调制.最后通过编程并利用FPGA板子实现AM、DBS、SSB的调制。-Using Verilog language source code. Invoke some basic IP cores, such as DCM module, DDS module ChipScope modules, multiplier module to achieve modulation.
UART
- 本人用verilog编写的UART协议，经测试可用。(I am prepared to use verilog UART protocol, the test is available.)