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trans4_16
- 看了好多网了，发现有2to4译码，3to8译码，今天我要用4to16译码，写完了就发了上来-saw a lot of net and found 2to4 decoding, 3to8 decoding, today, I must 4to16 decoding, finished on the fat in the ranks
单片机坐标定时器实验
- http://www.edacn.net/cgi-bin/forums.cgi?forum=7&topic=9127下,则R3～R0的输出信号中会有一个为1,但我们还是是无法确定哪一个键被按下,必須要从R3 ～R0 的输出信号与C3～C0的扫描信号共同決定那个按键被按下. 编写VHDL的构思: 外部接口包括: a. INPUT脚 : CLK , R3～R0. b. OUTPUT脚 : C3～C0 , DATA3～DATA0(辨别出的按键值). -7topic http://ww
vliw
- vliw processor core vhdl files compiled by myself partly and through the help of net resources.
miniuart.tar
- Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication is very common that almost eve
VHDL-Cookbook
- The VHDL book http://www.onlinefreeebooks.net/engineering-ebooks/electrical-engineering/the-vhdl-cookbook-pdf.html
8light
- 八灯控制--更多资料请登陆网站查询 欢迎大家到新势力论坛讨论交流 www.xinshili.net 新势力论坛 51单片机、AVR单片机、ARM嵌入式、工控自动化 资源来自网络,如有侵权行为,请联系告之,我们会马上更正.-8 light
NET2
- 在niosII 的环境下实现的网络通信,可以通过FPGA开发板观察数据传送-niosII net
ethernet_tri_mode
- Its an verilog coded ether net tri mode project
muxsend
- 调用已绑定的网口 发送vlan包。适用于再次开发中遇到网口已被底层绑定的需求。-Call the net mouth has been bound to send vlan packets. For re-development of the net mouth has been encountered in the bottom bound needs.
fpga2
- an artical about controller area protocol and fpga device that i found on the net.
pingpang
- 两人乒乓球游戏机是用9个发光二极管代表乒乓球台，用点亮的发光二极管按一定的方向移动来表示球的运动。在游戏机的两侧各设置一个开关，即击球开关Hit A，HitB。甲乙二人按乒乓球比赛规则来操作开关。当甲按动击球开关时，靠近甲的第一个二极管亮，然后发光二极管由甲向乙依次点亮，代表乒乓球的移动。当球过网（中点）时，乙方可以击球。若乙方提前或是没击中球则判乙方失分，甲方的计分牌自动加分。然后重新发球，比赛继续。比赛直到一方分数达到11分时，比赛结束。 -Two table tennis game w
SDC
- quartus官网内总结的sdc有关资料学习-quartus official summary of the net to learn the information sdc
img
- 通过电阻分压实现VGA彩色显示的VHDL程序，可以在屏幕上实现彩色圆球的滚动效果。-VHDL program can realize moving color ball on the screen which using resistor net
pingpang
- 模拟乒乓球游戏机，输入有按键消抖模块，利用两个七段数码管的其中9段来模拟乒乓球的移动路线，中间的数码管兼做球网。-Table tennis simulation game, enter a key debounce module, using two seven-segment digital tube to simulate the Table Tennis section 9 of the mobile line, cater to the middle of the digital net
sdram_yadmc.tar
- /* * Yet Another Dynamic Memory Controller * Copyright (C) 2008 Sebastien Bourdeauducq - http://lekernel.net * This file is part of Milkymist. * * Milkymist is free software you can redistribute it and/or modify it * under the terms
mdf-code-4m-net
- median filter algorithm , VHDL code
Verilog
- 在Verilog中有两种类型的赋值语句：连续赋值和过程赋值。赋值表达式由三个部分组成：左值、赋值运算符（=或<=）和右值。右值可以是任何类型的数据，包括net型和register型；但对连续赋值，左值必须是net类型的数据；而过程赋值，左值必须是register类型的数据。下面将作详细描述-There are two types in the Verilog assignment statement: continuous assignment and process assignment
vhdl-net
- various vhdl codes for comaprator, digital clock.
EDA
- 基于VHDL实现乒乓球游戏机的功能，以发光二极管模拟乒乓球及球网，可以选择球的速度-VHDL implementation based on the function of table tennis games, table tennis and with LED simulated the net, you can choose the speed of the ball
DE2_NET
- 基于nios ii处理器的net通信程序 -Nios ii processor based on the net communication program