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基于vhdl的二进制转BCD码的设计
- 基于vhdl的二进制转BCD码的设计，已经经过调试，可直接使用,Vhdl based on binary code to BCD design, has been testing can be used directly
part2
- Implement a 3-digit BCD counter. Display the contents of the counter on the 7-segment displays, HEX2− 0. Derive a control signal, from the 50-MHz clock signal provided on the DE2 board, to increment the contents of the counter at one-se
freqm
- a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
Bin16_BCD5
- it is a binary16 to BCD converter .it will work on spartan 3 xilini devices.
bin2bcd
- Binary to BCD converter
MultBCD
- Multiplier BCD - vhdl-Multiplier BCD- vhdl
7-segment
- VHDL Design of BCD to 7-segment decoder using PROM
bcd
- EDA 十进制计数器、BCD VHDL源代码-EDA decimal counter VHDL source code
BCD
- BCD数码管显示 在DE2平台上运行 quartus-BCD digital display in the DE2 platform quartus
BCD
- vhdl写的十进制转BCD的源代码-vhdl decimal to BCD written the source code~~~~~~~~~~~~~~~~~
BIN_BCD
- 用硬件描述语音实现二进制数据转换成BCD数据-Using hardware descr iption voice to achieve the binary data into BCD data
bcd-decoder
- 用Verilog实现的BCD译码器. 经Quartus||波形仿真无误 经硬件验证无误-BCD decoder Realized by Verilog
BCD
- 基于VHDL语言，实现二进制转换为BCD码。-Based on the VHDL language, to achieve a binary code is converted to BCD.
BCD
- BCD码和二进制之间的转化，FPGA中的实现，内附原理及代码！-BCD conversion between binary code and, FPGA Realization of, containing principles and code!
bcd
- 4位bcd码加法器的verilog代码 -4 bit bcdadder verilog4 bit bcdadder verilog
2-Decimal-BCD-Decoder
- 二-十进制BCD译码器，就是用VDHL编写的将二进制转化为十进制的BCD译码器-2- Decimal BCD Decoder, is to use VDHL written into the binary decimal BCD decoder
BCD
- BCD码减法实现程序，非常完整，采用Verilog HDL语言实现。-BCD subtraction to achieve program code, very complete, using Verilog HDL language.
bcd
- 4位二进制数转BCD码，由拨码键盘输入，结果由数码管显示-BCD 4-bit binary code switch from dial code keyboard input, the results from the digital display
Optimized-design-of-BCD-adder-and-Carry
- Optimized design of BCD adder and Carry
BCD counter( state machine)
- a vhdl source code for BCD