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cfft
- 参数化FFT源代码，点数和位宽可变，内附testbench和说明文档-parameters of the source code FFT, counting and variable bit-enclosing testbench and documentation
cfft
- CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现
vhdlfftdesign
- 浮点FFI，的VHDL实现及HDL功能测试方法的研究 附录B加法处理器测试平台代码 附录CFFT处理器的测试平台代码-The floating-point FFI company encourages, implement and function testing HDL VHDL method The appendix B addition processor test platform code Appendix CFFT processor test platform co
cfft
- 基于FPGA的快速傅里叶算法设计，VHDL语言写的，编译可通过-FPGA-based fast Fourier algorithm design, VHDL language, the compiler can
cfft
- 用verilog语言编写的基4FFT，采用CORDIC算法实现的，仿真过，结果很好！-I use verilog language to design a FFT base 4,and use CORDIC arithmetic to achieve this. last , I test it, it looks very good
cfft
- The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers.-The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks
cFFT
- CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be differen
cfft
- vhdl code for cyclic cfft
cfft_control
- vhdl code for cyclic cfft control
mycfft
- LTE通信中的cfft算法的VERILOG实现，具有一定的参考意义。-LTE communication in the VERILOG algorithm CFFT implementation, with a certain reference value.