一个序列检测器的FPGA设计实验，通过LED灯显示，基于Spartan-3e开发板-The sequence detector will look for the input series “10010.” LED’s will show how much of the series has been detected and when the entire series has been entered an additional LED will come on. Circuit input

Debouncing Circuit implementing the Testing Circuit show in the Illustration 1. The input of verification is from a push button switch. In the lower part, the signal is first fed to a debouncing circuit and the to a rising edge detector.

状态机实现序列检测器。设计一个一个左移移位寄存器，用硬件设备上的两个拔码开关，预置一个8位二进制数作为待检测码，随着时钟逐步输入序列检测器，8个脉冲后检测器输出结果。-The state machine sequence detector. Design a left shift register, two on the hardware DIP switch and preset an 8-bit binary number as to be detected code, as the clo