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sourceIIR6
- IIR 六阶数字滤波器的 VHD L 描述-six-IIR Digital Filter Volume L Descr iption
4
- 基于FPGA的IIR数字滤波器的快捷设计 基于FPGA的IIR数字滤波器的快捷设计-FPGA-based IIR digital filter design shortcut FPGA-based IIR digital filter design of fast
FPGA1IIR4
- 关于iir介绍,希望与大家共同提高。对于了解此滤波器的学习以及研究很有帮助,资料的详细功能-About iir introduction, hope we can together. Filter learning for understanding and study of this useful, detailed information on features
shuzi
- 为了从模拟滤波器出发设计IIR数字滤波器,必须先设计一个满足技术指标的模拟滤波器,亦即要把数字滤波器的指标转换成模拟滤波器的指标,因此必须先设计对应的模拟原型滤波器。-Starting from the design of analog filters to IIR digital filter, you must first design an analog filter to meet the technical indicators, which indicators should con
VHD_IIR
- 基于VHDL的IIR数字滤波器(无限长冲激响应)-VHDL-based IIR digital filters (infinite impulse response)
digital-filter-simulation
- 数字滤波器设计把整个设计方案用VHDL语言进行了描述并在Modelsim上仿真。-digital filter IIR Matlab VHDL Modelsim simulation
vhdl_iir
- vhdl 代码实现的 iir 滤波器 包括 并行 流水线结构 超前进位结构-iir filter vhdl code to achieve parallel pipelined structure of ultra-ahead structure
IIR
- 环路滤波器的FPGA实现,使用VERILOG语言,ISE13.2编译环境-The loop filter FPGA realizing, use VERILOG language, ISE13.2 compile environment
hh
- 此文件是一个Butterworth IIR滤波器的VHDL程序,此滤波器是10阶的,通带频率在2.5MHz——7.5MHz,采样频率为200MHz。此滤波性能不是很好,仅供参考。-This file is the VHDL program in a Butterworth IIR filter, this filter is 10 bands, the frequency of the passband of 2.5MHz- 7.5MHz sampling frequency is 200MHz
Matlab-IIR
- 数字滤波器是数字信号处理的重要环节,数字滤波器可分为IIR和FIR两大类。本文介绍了IIR和FIR的基本设计原理以及在MATLAB环境下如何利用直接程序设计法、SPTOOL设计法和FDATOOL设计法给出IIR和FIR数字滤波器的设计方法和操作步骤,并给出设计设计实例及运行结果,同时利用MATLAB环境下的仿真软件SIMULINK对所设计的滤波器进行模拟仿真,仿真结果表示设计参数设置合理。-The important aspect of the digital filter is a digit
FPGA-multiplier-on-chip
- 典型实例11.5 FPGA片上硬件乘法器的使用 软件开发环境:ISE 7.1i 硬件开发环境:红色飓风II代-Xilinx版 本实例实现一个IIR滤波器,并在ISE里面进行仿真。 \rtl目录里面是源文件 \project目录里面是工程-Typical examples 11.5 FPGA chip hardware multiplier using the software development environment: ISE 7.1i hardware d
erjielvbq
- 使用verilog语言描述的二阶巴特沃斯IIR滤波器,程序中有参数说明,已经运行通过-Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter descr iption has been run through
graduate
- 基于fpga的IIR和FIR滤波器实现,里面有DA和AD模块,已经下载到板子上验证。-IIR and FIR filter fpga-based implementation, which has DA and AD modules have been downloaded to authenticate to the board.
iir_pipe
- 此程序应用了流水线技术来实现IIR滤波器,它是由一个非递归部分和一个具有延迟为2和系数为9/16的递归部分构成。-The procedure applied to the pipeline techniques to achieve an IIR filter, which consists of a non-recursive portion and having a delay of 2 and a coefficient of the recursive part 9/16 constit
AD_IIR_DA
- 该工程是信号经过ADS8326采集后,经过一个10阶带通IIR滤波器后,再经过10阶的带阻IIR滤波器,最后经过tlv5638输出。也可以选择信号经过AD采集后,直接送到DA输出。-The project is the signal after the ADS8326 collection, after a 10-order bandpass IIR filter, and then after 10 order bandstop IIR filter, and finally through
source
- 10阶iir滤波器量化系数如下 Qb1 = 18 75 194 354 499 558 499 354 194 75 18 Qa1 = 1024 -673 1886 -608 1043 -92 223 17 19 2 0 可以根据以上数据更改系数移植-10 order iir filter
IIR_TEST
- fpga开发IIR滤波器,滤除声音中的噪声。-fpga development IIR filter, filter out the sound of the noise.
iir
- 八阶巴特沃兹iir数字滤波器,四个二阶节,verilog代码实现,多路分时复用-batterworth,iir,8order,four second order section
IIR_filter
- FPGA实现IIR滤波器功能,采用Verilog程序编写方式来实现!-IIR filter
E4_4_IIR4Functions
- 用verilog语言实现的一个IIR滤波器,因为现在的ise等工具中没有包含相关的ip核,所以需要手动设计。 -With verilog language to achieve an IIR filter, because now ise and other tools do not contain the relevant ip kernel, so the need for manual design.