搜索资源列表
interface
- 采用Cyclone EP1C3,VHDL程序算法实现了信号波形的实时采样并回放,同时能测量时域信号的频率,通过与MCU的8位并行接口,进行相互通信。-Using Cyclone EP1C3, VHDL program algorithm of the signal waveform of real-time sampling and playback at the same time capable of measuring the frequency of the signal in time
AHB_SRRAM
- SSRAM with AHB bus interface source code
eth
- 一个ahb接口的千兆以太网MAC,包括apb的配置接口-Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
LIP4331CORE_PCI
- PCI Peripherial Communication Interface BUS Verilog sourc code
kb_code
- a source code of interface between keyboard and FPGA.
iic-spi-uart
- 基于FPGA的IIC,SPI,UART接口协议的实现。-FPGA-based IIC, SPI, UART interface protocol implementation.
interface
- 单片机接口实用程序,包括I2C,SPI总线的程序,各程序均已调试成功。-MCU interface utilities, including I2C, SPI bus, the procedures, the procedures are debugging success.
ADCData
- ADC Interface to read into FPGA
Schmitt-trigger-keyboard-interface
- 基于施密特触发的键盘接口电路,有效降低触发延迟,缩短键盘反应时间 以verilog实现-Schmitt trigger on the keyboard interface circuit, effectively reducing the trigger delay and shorten the reaction time to verilog implementation keyboard
ADV7441A-Evaluation-Board-Documents
- ADI 744x HDMI输入,输出原理图,包括电源,接口,以及FPGA等原理图-ADI 744x HDMI input, output, schematics, including power supplies, interface, and other schematic FPGA
PCI-bus-interface-controller
- PCI总线接口控制器的FPGA设计与实现。本文档介绍了接口控制器的实现思想。-PCI bus interface controller FPGA design and implementation. This document describes the interface controller implementation ideas.
AdcClock
- Device: Virtex-6 -- Author: Marc Defossez -- Entity Name: AdcClock -- Purpose: High-speed local clock control for an interface between a FPGA and a -- Texas Instruments ADC. -- Tools: ISE - XST -- Limitations: none -- -- Revis
interface
- verilog 实现MCU的接口寄存器的描述。八位寄存器宽度。-verilog, MCU interface register descr iptions. Eight register width.
CPLD-8051-Micorcontroller-Interface
- CPLD 与8051总线接口设计,XILINX参考设计-CPLD and 8051 bus interface, XILINX reference design
The-scheme-of-USB-interface
- 本文采用 USB 接口芯片+FPGA+自行设计的 429 总线驱动电路的方案, 完成了 USB-429 总线接口的设计。其中,USB 接口芯片采用 Cypress 公司的 从设备芯片 CY7C68013,实现了与计算机 USB 总线接口的数据通信。FPGA 代替 429 专用协议收发芯片,完成 429 总线数据的格式转换和协议处理,设 计更为灵活,成本更加低廉-The scheme of USB interface chip+ FPGA+ self-designed 429 bu
the-PCIE-interface-design
- 基于wishbone和端点IP的PCIE接口设计,介绍了PCIE硬核端点模块和wishbone总线规范,应用WHDL语言,编程实现了wishbone总线的主从端口-Based the PCIE interface design of the wishbone and the endpoint IP, PCIE hard core endpoint module and Wishbone bus specification, application WHDL language programmin
TLC7524-interface-circuit-program
- 使用VHDL语言,编写的TLC7524接口电路程序,-Using VHDL language, interface circuit TLC7524 written procedures,
DAC0832-Interface-Circuit-program
- DAC0832 接口电路程序VHDL源代码及仿真-DAC0832 Interface Circuit VHDL source code and simulation program
TLC7524-interface-circuit-program
- TLC7524接口电路程序VHDL实现及仿真-TLC7524 interface circuit VHDL implementation and simulation program
SPDIF-interface-IP-core
- SPDIF数字音频接口的的程序,已写成通用IP核形式。-The program SPDIF digital audio interface has been written in the form of common IP core.