本文介绍了一个简单的计算器的设计，该设计采用了现场可编程逻辑器件FPGA设计，并基于VHDL语言实现加减乘除功能，并用十进制显示在LCD1602上。-This article describes a simple calculator design that uses a field programmable logic device FPGA design and VHDL language based on arithmetic functions, and decimal display

基于FPGA DE2开发板的计算器设计。Verilog语言编写。矩阵键盘输入，LCD1602显示。程序包括按键扫描模块、数值处理计算模块和LCD控制写模块等。-Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD module