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LinPF
- This a VHDL module that implements linear prediction filter based on NLMS (normalized least mean square). The module takes complex signal as input and output comlex signal (real and imaginary). Tap size is 4, bit precision is set to 12 bits.-This i
3_3_mean_diltter(ALU)
- 3*3均值滤波的VHDL语言实现的工程，对红外图像进行有效的去噪处理。这是其中的ALU模块，专门用来测试其延迟状况的模块。-3* 3 mean filter VHDL language works effectively on the infrared image denoising. This is one of the ALU module, designed to test the status of the module delay.
fir_pipeline_lms
- verilog语言编写LMS（最小均方误差）自适应滤波器。-verilog language LMS (least mean square error) adaptive filter.
fir_lms
- verilog语言编写LMS（最小均方误差）自适应滤波器。-verilog language LMS (least mean square error) adaptive filter.
mean
- 3x3 Average filter in VHDL
filter2
- 本实验完成加权均值滤波，其原理如下： 设采集到的数据按节拍输入，依次表示为d0，d1，d2，d3，d4,…，则输出依次为 do= d0*1/4+d1*1/2+d2*1/4 do= d1*1/4+d2*1/2+d3*1/4 … 假设采集到的数据为8位unsigned，输出do只保留整数。-This experiment is completed weighted mean filter, which works as follows: Set data collected
module-mf
- verilog Implementation of Mean filter to implement in FPGA