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pci 的vhdl 源代码
- pci 的vhdl 源代码-The source code of PCI VHDL.
PCI_target
- VHDL编写的PCI代码,PCI2.2兼容,Xillinx Virtex与Spantan II 优化,33M主频,32位宽度,全目标功能等.-prepared by the PCI VHDL code, PCI2.2 compatible Xillinx Virtex II and Spantan optimized route speed, 32-bit width, the whole objective functions.
pcicard.rar
- pci debug card 的VHDL源代码,pci debug card of the VHDL source code
PCI-IPcoreor1k[1]
- PCI的ip core，VHDL代码，希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
PCI_arbi
- PCI arbi verilog source code
fifo1k_32
- PCI 数据采集控制卡的内部 FIFO处理代码-Data Acquisition and Control Card PCI internal FIFO handling code
yuyincaiji
- 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
opencore_crt
- 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
testbench
- altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
pci
- pci总线源代码，总线设计参考。适合于飓风系列FPGA设计参考。-pci bus source code, the bus design. For hurricane series FPGA design.
pic8255
- PCI 8255 VHDL 源代码，主要含有主模块以及部分副模块-PCI 8255 VHDL CODE
pci_steuerung_target
- vhdl code for card pci to fpga
pci_steuerung_master
- vhdl code for card pci to fpga
fpga_A
- vhdl code for card pci to fpga
eeprom_out
- vhdl code for card pci to fpga
Xilinx_PCIE_DMA
- Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
PCI-dio
- 基于PCI的DIO接口程序，包括verilog源程序、驱动源程序以及寄存器说明文件-PCI-DIO-based interface program, including the verilog source code, driver source code and documentation register
pci_gr
- vhdl code for Simple PCI target interface
MYPCI
- PCI VHDL程序，根据PCI通信协议编写的，，，没有用IP核，。。。本人接触PCI不久，次代码可能会存在些问题，请各位高手指点指点，小弟不尽感激-PCI VHDL procedures, according to the PCI communication protocols written, without using IP cores. . . I contact PCI soon, there may be some minor code issues, please master g