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RS232串口通信协议
- RS232串口通信协议，verilog实现，通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
rs232
- 通过FPGA实现串口通信，结果在超级终端可见-Serial communication through the FPGA, the result can be seen in the HyperTerminal
DM2_KX8051_FTEST_RS232_C5T
- 这是一个FPGA的简单例程，主要是基于FPGA的232串口通信的例程-This is a simple routine FPGA is mainly based on FPGA-232 serial communication routines
RS232
- RS232_串口通信的发送端verilog源程序代码-RS232_ serial communication sender verilog source code
rs232
- 用vhdl实现fpga串口通信 包含 波特率生成 发送模块 接收模块 过采样 signaltap使用-Vhdl fpga serial communication with the realization of sending module contains the baud rate generation receiver module using oversampling signaltap
rs232
- 本设计是PC和FPGA的串口通信的程序，用的是VERILOG语言，调试成功，用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
FPGA_RS_232
- 这个源码是经过对RS232长时间的研究得到的扩展性代码，主要的功能是计算机发给FPGA数据，FPGA利用这些数据去驱动数码管显示，然后再把数据通过串口传给计算机，通过串口调试软件看到你发给FPGA的数据，建议大家先看明白RS232串口通信协议之后再动手编模块。-FPGA_RS_232
RS232
- RS232 串口通信 的 VHDL描述，初学FPGA的朋友可以-RS232 serial communication VHDL descr iption, FPGA beginner friends can see
RS232_ysd
- RS232串口通信程序，经过开发板验证，程序正确无误，是采用Verilog语言编写的-RS232 serial communication program, through the development board verification, the program is correct, is written using Verilog
FPGA-UART
- 该资料是实现VHDL的串口通信(UART)，RS232接口协议，-VHDL implementation of serial communication
RS_232
- VHDL实现RS232串口通信，压缩包内有完整的quartus2工程，由顶层，波特率，发送，接收四个模块构成。外部电路只需要一片MAX232就能与串口助手或单片机通信。-VHDL implementation of RS232 serial communication, compressed within a complete quartus2 project from the top, baud rate, send, receive four modules. External circui
ps2-RS232
- PS2键盘字符码输出，通过FPGA控制，与pc机实现串口通信（RS232）-PS2 keyboard character code output by FPGA control, serial communication with the pc-(RS232)
rs232
- rs232串口通信实验4位的串口，verilog源代码。-rs232 serial communication experiment 4 serial, verilog source code
RS232
- 用verilog编写的RS232串口通信源码，大家可以参考一下哈哈哈。希望大神指正-Verilog prepared using RS232 serial communication source code, we can refer to Ha ha ha. Great God hope corrected
UART-Altera
- 使用Atera FPGA CycloneII 实现串口通信，遵循RS232协议。FPGA上的模块实现了数据的接收，取补码和发送。(Achieve serial communication with FPGA, following the protocol of RS232.)
ex8_232
- 这是一个用于自收自发的uart通讯代码，包括波特率设置模块、uart收发模块，上位机使用串口调试助手(Uart module is used to communite with PC in the way of spontaneous collection, including buad setting and transceiver. Upper computer is serial debugging assistant.)
No.201710061347=UART_Verilog
- 1.硬件平台： FPGA； 2.编程语言： Verilog； 3.串口通信RS232的Verilog实现版本；(1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;)
RS232
- 基于altera MAX II,实现与上位机间的rs232串口通信。(Based on Altera MAX II, the RS232 serial communication between the host computer and the host computer is realized)
uart
- 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。 使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)
rs232
- 使用VHDL语言在vivado平台上编的串口通信的完整工程，并能用EGO1开发板成功验证(The complete project of serial communication is compiled on the vivado platform using VHDL language, and it can be successfully verified with the EGO1 development board.)